From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B8B16C44501 for ; Thu, 9 Jul 2026 12:57:38 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id: Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-Id:Date :Subject:To:From:Reply-To:Content-Type:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=l+pkSXZd2+DlM8PfpUdH15uSsO/oVuoXTdSYdfWcOqY=; b=qZnRGLTLJ9CG33 SKMs52/LQ/tkDxXdd1ecrJOTJWZKdEDWQkZfDExp+iiI0MCOD9WanzlCcaok2tb3iX9ZuwsePRe9A CNtnBnltvggRvjO/CqWrhCRGSQ730WceONCTIp8q+k7/r0D3hmMSKNUe2AzOwCxXld+4jvopVFcdC rpH5+AnCxdxiUhpHv3ApwWcmXoa/P9RxmSnAFD9PIkiIF+q9s7VwCEjhgV2PDJz0U5+/vd0yha3Q4 PqqyGn7JJWlHQC6RIyTDs1vpiZnB8bq9dWQbOXcRXg0DzbrlkolVYaFF8JqXzvKqHXqfIP4XbQ69Z O8vaJRvdxIHZXOmS+/xw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.99.1 #2 (Red Hat Linux)) id 1whneM-00000002LI1-1f6K; Thu, 09 Jul 2026 12:14:42 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.99.1 #2 (Red Hat Linux)) id 1whndz-00000002KkW-2hX0 for linux-arm-kernel@lists.infradead.org; Thu, 09 Jul 2026 12:14:20 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id B2298339; Thu, 9 Jul 2026 05:14:14 -0700 (PDT) Received: from login2.euhpc2.arm.com (login2.euhpc2.arm.com [10.58.100.22]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id D65B43F66F; Thu, 9 Jul 2026 05:14:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1783599259; bh=LvxXCca/Fyvf8EuFppXc3svA3oKROOnygjBFwrtbr5s=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=raxSH7JJRrFQgQsWEDO7XZ17gREQs/iyjeQrhKX1Zn6hKFY5bH+F2hSJ9T/pRAqLL GVv7W05gA2jRTmemIUhaZkG6e4yr8TW0gOBwr0Fr2lFP8OGat63tXISsMZrDlF2LxX usDZUuxbPi2yB05ynUqDWLNJdh97QCkji/gT7H14= From: Vladimir Murzin To: linux-arm-kernel@lists.infradead.org Subject: [RFC PATCH 17/36] arm64: remove daifflags.h Date: Thu, 9 Jul 2026 13:13:14 +0100 Message-Id: <20260709121333.23507-18-vladimir.murzin@arm.com> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20260709121333.23507-1-vladimir.murzin@arm.com> References: <20260709121333.23507-1-vladimir.murzin@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260709_051419_802254_05023E02 X-CRM114-Status: GOOD ( 19.62 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mark.rutland@arm.com, maz@kernel.org, ruanjinjie@huawei.com, catalin.marinas@arm.com, will@kernel.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Ada Couprie Diaz Interrupt masking is now split in different APIs and `local_daif_...` functions are not in use anymore. The `DAIF_...` masks defines are now in `asm/interrupts/common_flags.h`, so we can safely remove `daifflags.h` and all `#include`s referring to it. Only kprobes.c and process.c use `DAIF_...` masks defines, so add the new header there. Signed-off-by: Ada Couprie Diaz Signed-off-by: Vladimir Murzin --- arch/arm64/include/asm/daifflags.h | 123 -------------------------- arch/arm64/include/asm/entry-common.h | 1 - arch/arm64/include/asm/kvm_host.h | 1 - arch/arm64/include/asm/mmu_context.h | 1 - arch/arm64/kernel/debug-monitors.c | 1 - arch/arm64/kernel/probes/kprobes.c | 2 +- arch/arm64/kernel/signal.c | 1 - arch/arm64/kernel/traps.c | 1 - arch/arm64/mm/fault.c | 1 - 9 files changed, 1 insertion(+), 131 deletions(-) delete mode 100644 arch/arm64/include/asm/daifflags.h diff --git a/arch/arm64/include/asm/daifflags.h b/arch/arm64/include/asm/daifflags.h deleted file mode 100644 index 8f097a2d9099..000000000000 --- a/arch/arm64/include/asm/daifflags.h +++ /dev/null @@ -1,123 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ -/* - * Copyright (C) 2017 ARM Ltd. - */ -#ifndef __ASM_DAIFFLAGS_H -#define __ASM_DAIFFLAGS_H - -#include - -#include -#include -#include -#include - -#define DAIF_PROCCTX 0 -#define DAIF_PROCCTX_NOIRQ (PSR_I_BIT | PSR_F_BIT) -#define DAIF_ERRCTX (PSR_A_BIT | PSR_I_BIT | PSR_F_BIT) -#define DAIF_MASK (PSR_D_BIT | PSR_A_BIT | PSR_I_BIT | PSR_F_BIT) - - -/* mask/save/unmask/restore all exceptions, including interrupts. */ -static __always_inline void local_daif_mask(void) -{ - WARN_ON(system_has_prio_mask_debugging() && - (read_sysreg_s(SYS_ICC_PMR_EL1) == (GIC_PRIO_IRQOFF | - GIC_PRIO_PSR_I_SET))); - - asm volatile( - "msr daifset, #0xf // local_daif_mask\n" - : - : - : "memory"); - - /* Don't really care for a dsb here, we don't intend to enable IRQs */ - if (system_uses_irq_prio_masking()) - gic_write_pmr(GIC_PRIO_IRQON | GIC_PRIO_PSR_I_SET); - - trace_hardirqs_off(); -} - -static __always_inline unsigned long local_daif_save_flags(void) -{ - unsigned long flags; - - flags = read_sysreg(daif); - - if (system_uses_irq_prio_masking()) { - /* If IRQs are masked with PMR, reflect it in the flags */ - if (read_sysreg_s(SYS_ICC_PMR_EL1) != GIC_PRIO_IRQON) - flags |= PSR_I_BIT | PSR_F_BIT; - } - - return flags; -} - -static __always_inline unsigned long local_daif_save(void) -{ - unsigned long flags; - - flags = local_daif_save_flags(); - - local_daif_mask(); - - return flags; -} - -static __always_inline void local_daif_restore(unsigned long flags) -{ - bool irq_disabled = flags & PSR_I_BIT; - - WARN_ON(system_has_prio_mask_debugging() && - (read_sysreg(daif) & (PSR_I_BIT | PSR_F_BIT)) != (PSR_I_BIT | PSR_F_BIT)); - - if (!irq_disabled) { - trace_hardirqs_on(); - - if (system_uses_irq_prio_masking()) { - gic_write_pmr(GIC_PRIO_IRQON); - pmr_sync(); - } - } else if (system_uses_irq_prio_masking()) { - u64 pmr; - - if (!(flags & PSR_A_BIT)) { - /* - * If interrupts are disabled but we can take - * asynchronous errors, we can take NMIs - */ - flags &= ~(PSR_I_BIT | PSR_F_BIT); - pmr = GIC_PRIO_IRQOFF; - } else { - pmr = GIC_PRIO_IRQON | GIC_PRIO_PSR_I_SET; - } - - /* - * There has been concern that the write to daif - * might be reordered before this write to PMR. - * From the ARM ARM DDI 0487D.a, section D1.7.1 - * "Accessing PSTATE fields": - * Writes to the PSTATE fields have side-effects on - * various aspects of the PE operation. All of these - * side-effects are guaranteed: - * - Not to be visible to earlier instructions in - * the execution stream. - * - To be visible to later instructions in the - * execution stream - * - * Also, writes to PMR are self-synchronizing, so no - * interrupts with a lower priority than PMR is signaled - * to the PE after the write. - * - * So we don't need additional synchronization here. - */ - gic_write_pmr(pmr); - } - - write_sysreg(flags, daif); - - if (irq_disabled) - trace_hardirqs_off(); -} - -#endif diff --git a/arch/arm64/include/asm/entry-common.h b/arch/arm64/include/asm/entry-common.h index 1905765159aa..73d82a8d8e95 100644 --- a/arch/arm64/include/asm/entry-common.h +++ b/arch/arm64/include/asm/entry-common.h @@ -6,7 +6,6 @@ #include #include -#include #include #include #include diff --git a/arch/arm64/include/asm/kvm_host.h b/arch/arm64/include/asm/kvm_host.h index bae2c4f92ef5..74358e93f1bb 100644 --- a/arch/arm64/include/asm/kvm_host.h +++ b/arch/arm64/include/asm/kvm_host.h @@ -23,7 +23,6 @@ #include #include #include -#include #include #include #include diff --git a/arch/arm64/include/asm/mmu_context.h b/arch/arm64/include/asm/mmu_context.h index 803b68758152..b3354a1350cf 100644 --- a/arch/arm64/include/asm/mmu_context.h +++ b/arch/arm64/include/asm/mmu_context.h @@ -19,7 +19,6 @@ #include #include -#include #include #include #include diff --git a/arch/arm64/kernel/debug-monitors.c b/arch/arm64/kernel/debug-monitors.c index e271fbac5f82..5db27c7e86bb 100644 --- a/arch/arm64/kernel/debug-monitors.c +++ b/arch/arm64/kernel/debug-monitors.c @@ -19,7 +19,6 @@ #include #include -#include #include #include #include diff --git a/arch/arm64/kernel/probes/kprobes.c b/arch/arm64/kernel/probes/kprobes.c index 43a0361a8bf0..d9d25d184309 100644 --- a/arch/arm64/kernel/probes/kprobes.c +++ b/arch/arm64/kernel/probes/kprobes.c @@ -24,9 +24,9 @@ #include #include -#include #include #include +#include #include #include #include diff --git a/arch/arm64/kernel/signal.c b/arch/arm64/kernel/signal.c index 38e6fa204c17..2276d316cc9e 100644 --- a/arch/arm64/kernel/signal.c +++ b/arch/arm64/kernel/signal.c @@ -22,7 +22,6 @@ #include #include -#include #include #include #include diff --git a/arch/arm64/kernel/traps.c b/arch/arm64/kernel/traps.c index 914282016069..77b6be6fc4c1 100644 --- a/arch/arm64/kernel/traps.c +++ b/arch/arm64/kernel/traps.c @@ -33,7 +33,6 @@ #include #include #include -#include #include #include #include diff --git a/arch/arm64/mm/fault.c b/arch/arm64/mm/fault.c index 85e23388f9bb..83aca64745f0 100644 --- a/arch/arm64/mm/fault.c +++ b/arch/arm64/mm/fault.c @@ -34,7 +34,6 @@ #include #include #include -#include #include #include #include -- 2.34.1