From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 99606C43458 for ; Fri, 10 Jul 2026 14:46:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=b7ASiQdIYL4/dZZXFPpxztY6qxfQwpAtDzu4FWJKbHE=; b=QpbOaax3dEKmhGKl5O4zya1lI/ 7i1FhUr8a6Yr+5Oh2rD8HVzJeB1/yvLz2J7R07EDdr7jCAefhoMnWvUYf3eueWOkC+VquL8UJHZLY bDbZ1Yo4rKJ8ROcpgPDanbK40Li0HHQo/TNrHHhne+Qa7X4Z80obSZWfqa9cYA0ZE9qk9ttGkiZpu Vwi0wDr7I3TPi4+QVome07xSyhw5V4uqnakgBgoEciiHgf2oOmZxXbzOtkIwpqMaiDGfmaLXf+VG6 FNr0rRG06nLZ7FdL/4iKdwTW+BEhV51n4Yoy50Wg8nhrtNjhubR4UXKysDJKVMG4TDXEeZIAgaUZ7 aNjgAT5A==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.99.1 #2 (Red Hat Linux)) id 1wiCUo-000000057I3-1EYl; Fri, 10 Jul 2026 14:46:30 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.99.1 #2 (Red Hat Linux)) id 1wiCUm-000000057G4-2DvM for linux-arm-kernel@lists.infradead.org; Fri, 10 Jul 2026 14:46:29 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 617F31E7D; Fri, 10 Jul 2026 07:46:22 -0700 (PDT) Received: from e142021.munich.arm.com (e142021.arm.com [10.41.150.148]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id BA5693F7B4; Fri, 10 Jul 2026 07:46:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1783694786; bh=9nyWinbuoPyugAl/Ma176q7b/W3ugsTwHcJ4M6XsbZU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=sBLVEQyGOyTjy3HGvsITwudjT7y/1YFK/Zeqy3XZtahs1uqXN+66C9QGmbFL58IaR kUSI6K9v0nzHSgo6D6b4C3jHpgk6gd4q3ua25zzwa3g4eFo6TClKrwTkfUWLhugI0a MJXOOoV3BsZtJGUk3VbP8hDiOGReatddN6ld1JZk= From: Andre Przywara To: Lorenzo Pieralisi , Hanjun Guo , Sudeep Holla , Catalin Marinas , Will Deacon , "Rafael J . Wysocki" , Len Brown , James Morse , Ben Horgan , Reinette Chatre , Fenghua Yu Cc: Jonathan Cameron , Srivathsa L Rao , Ganapatrao Kulkarni , Trilok Soni , Srinivas Ramana , Niyas Sait , linux-acpi@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 13/16] arm_mpam: prepare mon_sel locking for MPAM-Fb Date: Fri, 10 Jul 2026 16:45:17 +0200 Message-ID: <20260710144520.917375-14-andre.przywara@arm.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260710144520.917375-1-andre.przywara@arm.com> References: <20260710144520.917375-1-andre.przywara@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260710_074628_662729_94DF3E44 X-CRM114-Status: GOOD ( 17.49 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The MSC MON_SEL register needs to be accessed from hardirq for the overflow interrupt, and when taking an IPI to access these registers on platforms where MSC are not accesible from every CPU. This makes an irqsave spinlock the obvious lock to protect these registers. On systems with SCMI mailboxes it must be able to sleep, meaning a mutex must be used. The SCMI platforms can't support an overflow interrupt. Clearly these two can't exist for one MSC at the same time. Change the mon_sel locking wrapper function to only use a spinlock when the MSC is accessed directly via MMIO. In case of MPAM-Fb, we use a mutex, but only if we are in a sleepable context. If that's not the case, we return an error. This should not happen, as MPAM-Fb by design does not require an MSC access to happen from a specific CPU, so there is no need for any IPIs or preemption disabling to satisfy CPU constraints. And since overflow interrupts are not supported at the moment anyway, we also wouldn't meet the other case. Signed-off-by: Andre Przywara --- drivers/resctrl/mpam_internal.h | 28 +++++++++++++++++++++++----- 1 file changed, 23 insertions(+), 5 deletions(-) diff --git a/drivers/resctrl/mpam_internal.h b/drivers/resctrl/mpam_internal.h index 04d1a59f02af..7b6e0df904f8 100644 --- a/drivers/resctrl/mpam_internal.h +++ b/drivers/resctrl/mpam_internal.h @@ -126,6 +126,7 @@ struct mpam_msc { */ raw_spinlock_t _mon_sel_lock; unsigned long _mon_sel_flags; + struct mutex mon_sel_mutex; void __iomem *mapped_hwpage; size_t mapped_hwpage_sz; @@ -139,27 +140,44 @@ struct mpam_msc { /* Returning false here means accesses to mon_sel must fail and report an error. */ static inline bool __must_check mpam_mon_sel_lock(struct mpam_msc *msc) { - /* Locking will require updating to support a firmware backed interface */ - if (WARN_ON_ONCE(msc->iface != MPAM_IFACE_MMIO)) + if (msc->iface == MPAM_IFACE_MMIO) { + raw_spin_lock_irqsave(&msc->_mon_sel_lock, msc->_mon_sel_flags); + + return true; + } + + if (!preemptible()) return false; - raw_spin_lock_irqsave(&msc->_mon_sel_lock, msc->_mon_sel_flags); + mutex_lock(&msc->mon_sel_mutex); + return true; } static inline void mpam_mon_sel_unlock(struct mpam_msc *msc) { - raw_spin_unlock_irqrestore(&msc->_mon_sel_lock, msc->_mon_sel_flags); + if (msc->iface == MPAM_IFACE_MMIO) { + raw_spin_unlock_irqrestore(&msc->_mon_sel_lock, + msc->_mon_sel_flags); + + return; + } + + mutex_unlock(&msc->mon_sel_mutex); } static inline void mpam_mon_sel_lock_held(struct mpam_msc *msc) { - lockdep_assert_held_once(&msc->_mon_sel_lock); + if (msc->iface == MPAM_IFACE_MMIO) + lockdep_assert_held_once(&msc->_mon_sel_lock); + else + lockdep_assert_held_once(&msc->mon_sel_mutex); } static inline void mpam_mon_sel_lock_init(struct mpam_msc *msc) { raw_spin_lock_init(&msc->_mon_sel_lock); + mutex_init(&msc->mon_sel_mutex); } /* Bits for mpam features bitmaps */ -- 2.43.0