From: Krzysztof Kozlowski <krzk@kernel.org>
To: Junhui Liu <junhui.liu@pigmoral.tech>
Cc: Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
Brian Masney <bmasney@redhat.com>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Chen-Yu Tsai <wens@kernel.org>,
Jernej Skrabec <jernej.skrabec@gmail.com>,
Samuel Holland <samuel@sholland.org>,
Philipp Zabel <p.zabel@pengutronix.de>,
Paul Walmsley <pjw@kernel.org>,
Palmer Dabbelt <palmer@dabbelt.com>,
Albert Ou <aou@eecs.berkeley.edu>,
Alexandre Ghiti <alex@ghiti.fr>,
Richard Cochran <richardcochran@gmail.com>,
linux-clk@vger.kernel.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org,
linux-riscv@lists.infradead.org, netdev@vger.kernel.org,
Jerome Brunet <jbrunet@baylibre.com>
Subject: Re: [PATCH v2 1/8] dt-bindings: clk: sun60i-a733-ccu: Add allwinner A733 support
Date: Sun, 12 Jul 2026 16:35:16 +0200 [thread overview]
Message-ID: <20260712-sexy-polar-cuckoo-cefee4@quoll> (raw)
In-Reply-To: <20260711-a733-clk-v2-1-974d188cbe0c@pigmoral.tech>
On Sat, Jul 11, 2026 at 04:10:27PM +0800, Junhui Liu wrote:
> +properties:
> + "#clock-cells":
> + const: 1
> +
> + "#reset-cells":
> + const: 1
> +
Please order according to DTS coding style. compatible is ALWAYS the
first, then reg. Then name ordering, so reset-cells go to the end.
> + compatible:
> + enum:
> + - allwinner,sun60i-a733-ccu
> + - allwinner,sun60i-a733-r-ccu
> +
> + reg:
> + maxItems: 1
> +
> + clocks:
> + minItems: 4
> + maxItems: 7
> +
> + clock-names:
> + minItems: 4
> + maxItems: 7
> +
> +required:
> + - "#clock-cells"
> + - "#reset-cells"
As well.
> + - compatible
> + - reg
> + - clocks
> + - clock-names
> +
> +allOf:
> + - if:
> + properties:
> + compatible:
> + enum:
> + - allwinner,sun60i-a733-ccu
> +
> + then:
> + properties:
> + clocks:
> + items:
> + - description: High Frequency Oscillator (19.2MHz, 24MHz, or 26MHz)
> + - description: Low Frequency Oscillator (usually at 32kHz)
> + - description: Internal Oscillator
> + - description: Low Frequency Oscillator fanout
> +
> + clock-names:
> + items:
> + - const: hosc
> + - const: losc
> + - const: iosc
> + - const: losc-fanout
> +
> + - if:
> + properties:
> + compatible:
> + enum:
> + - allwinner,sun60i-a733-r-ccu
> +
> + then:
> + properties:
> + clocks:
> + items:
> + - description: High Frequency Oscillator (19.2MHz, 24MHz, or 26MHz)
> + - description: Low Frequency Oscillator (usually at 32kHz)
> + - description: Internal Oscillator
> + - description: System 24MHz Clock
> + - description: Peripherals PLL 0 (200 MHz output)
> + - description: Peripherals PLL 0 (300 MHz output)
> + - description: Peripherals PLL 1 (300 MHz output)
> +
> + clock-names:
> + items:
> + - const: hosc
> + - const: losc
> + - const: iosc
> + - const: sys-24m
> + - const: pll-periph0-200m
> + - const: pll-periph0-300m
> + - const: pll-periph1-300m
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + clock-controller@2002000 {
> + compatible = "allwinner,sun60i-a733-ccu";
> + reg = <0x02002000 0x2000>;
> + clocks = <&osc>, <&rtc 0>, <&rtc 2>, <&rtc 1>;
> + clock-names = "hosc", "losc", "iosc", "losc-fanout";
> + #clock-cells = <1>;
> + #reset-cells = <1>;
> + };
> +
> +...
> diff --git a/include/dt-bindings/clock/sun60i-a733-ccu.h b/include/dt-bindings/clock/sun60i-a733-ccu.h
> new file mode 100644
> index 000000000000..6742070e3086
> --- /dev/null
> +++ b/include/dt-bindings/clock/sun60i-a733-ccu.h
Filename must match compatible.
> @@ -0,0 +1,290 @@
> +/* SPDX-License-Identifier: (GPL-2.0-only OR MIT) */
Why different license than the binding?
> +/*
> + * Copyright (C) 2026 Junhui Liu <junhui.liu@pigmoral.tech>
...
> +#define CLK_BUS_DSC 257
> +#define CLK_CSI_MASTER0 258
> +#define CLK_CSI_MASTER1 259
> +#define CLK_CSI_MASTER2 260
> +#define CLK_CSI 261
> +#define CLK_BUS_CSI 262
> +#define CLK_ISP 263
> +#define CLK_RES_DCAP_24M 264
> +#define CLK_APB2JTAG 265
> +#define CLK_FANOUT_24M 266
> +#define CLK_FANOUT_12M 267
> +#define CLK_FANOUT_16M 268
> +#define CLK_FANOUT_25M 269
> +#define CLK_FANOUT_27M 270
> +#define CLK_FANOUT_PCLK 271
> +#define CLK_FANOUT0 272
> +#define CLK_FANOUT1 273
> +#define CLK_FANOUT2 274
> +#define CLK_FANOUT3 275
> +
> +#endif /* _DT_BINDINGS_CLK_SUN60I_A733_CCU_H_ */
> diff --git a/include/dt-bindings/clock/sun60i-a733-r-ccu.h b/include/dt-bindings/clock/sun60i-a733-r-ccu.h
> new file mode 100644
> index 000000000000..1d3845b483bf
> --- /dev/null
> +++ b/include/dt-bindings/clock/sun60i-a733-r-ccu.h
Here as well and so on (other places as well).
Best regards,
Krzysztof
next prev parent reply other threads:[~2026-07-12 14:35 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-11 8:10 [PATCH v2 0/8] clk: sunxi-ng: Add support for Allwinner A733 CCU and PRCM Junhui Liu
2026-07-11 8:10 ` [PATCH v2 1/8] dt-bindings: clk: sun60i-a733-ccu: Add allwinner A733 support Junhui Liu
2026-07-12 14:35 ` Krzysztof Kozlowski [this message]
2026-07-11 8:10 ` [PATCH v2 2/8] clk: sunxi-ng: sdm: Add dual patterns support Junhui Liu
2026-07-11 8:10 ` [PATCH v2 3/8] clk: sunxi-ng: a733: Add PRCM CCU Junhui Liu
2026-07-11 8:10 ` [PATCH v2 4/8] clk: sunxi-ng: a733: Add PLL clocks support Junhui Liu
2026-07-11 8:10 ` [PATCH v2 5/8] clk: sunxi-ng: a733: Add bus " Junhui Liu
2026-07-11 8:10 ` [PATCH v2 6/8] clk: sunxi-ng: a733: Add mod " Junhui Liu
2026-07-12 14:25 ` Junhui Liu
2026-07-11 8:10 ` [PATCH v2 7/8] clk: sunxi-ng: a733: Add bus clock gates Junhui Liu
2026-07-12 14:29 ` Junhui Liu
2026-07-11 8:10 ` [PATCH v2 8/8] clk: sunxi-ng: a733: Add reset lines Junhui Liu
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