From: Linu Cherian <linu.cherian@arm.com>
To: Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>,
Ryan Roberts <ryan.roberts@arm.com>,
Kevin Brodsky <kevin.brodsky@arm.com>,
Anshuman Khandual <anshuman.khandual@arm.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Mark Rutland <mark.rutland@arm.com>
Cc: linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, Linu Cherian <linu.cherian@arm.com>
Subject: [PATCH v3 0/6] Add BBML3 cpu feature
Date: Wed, 15 Jul 2026 11:04:02 +0530 [thread overview]
Message-ID: <20260715053408.1950475-1-linu.cherian@arm.com> (raw)
- Patches 1, 2 and 3 adds more cpus to the bbml2_noabort
support list. bbml2_noabort would eventually gets renamed
to bbml3 in a subsequent patch as they are functionally
equivalent.
- Patches 4, 5 & 6 introduces BBML3 cpu feature
Changelog from v2:
* Added errata id to Documentation/arch/arm64/silicon-errata.rst
in patch 3. Added comments in code related to errata as well.
* Fixed register name typo in commit message in patch 4.
* Renamed patch title in patch 5.
* Commit message reworded in patch 6.
* No functional changes in this version.
Changelog from v1:
* Patches associated with adding cpus to BBML2_NOABORT,
support list, were kept at bottom in v1 is now moved
up in this version, for ease of backporting.
* Adding BBM_3 definition in sysreg moved into a separate patch
* MMFR2_ID check for BBM_3 has been changed from == BBM_3 to
>= BBM_3, so that BBML3 cpu feature gets enabled for BBM_4 as well.
* For feature detection, MMFR2_ID check comes first followed by
midr check for code readability
* Errata details for C1-Ultra and C1-Premium added to commit message
Linu Cherian (6):
arm64: cputype: Add Cortex-A520AE definitions
arm64: cputype: Add C1-Nano definitions
arm64: cpufeature: Extend bbml2_noabort support list
arm64: sysreg: Add BBM_3
arm64: cpufeature: Rename BBML2_NOABORT as BBML3
arm64: cpufeature: Detect BBML3 based on ID_AA64MMFR2_EL1.BBM
Documentation/arch/arm64/silicon-errata.rst | 4 ++
arch/arm64/include/asm/cpufeature.h | 6 +--
arch/arm64/include/asm/cputype.h | 4 ++
arch/arm64/kernel/cpufeature.c | 55 ++++++++++-----------
arch/arm64/mm/contpte.c | 21 +++-----
arch/arm64/mm/mmu.c | 52 +++++++++----------
arch/arm64/mm/proc.S | 4 +-
arch/arm64/tools/cpucaps | 2 +-
arch/arm64/tools/sysreg | 1 +
9 files changed, 76 insertions(+), 73 deletions(-)
--
2.43.0
next reply other threads:[~2026-07-15 5:34 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-15 5:34 Linu Cherian [this message]
2026-07-15 5:34 ` [PATCH v3 1/6] arm64: cputype: Add Cortex-A520AE definitions Linu Cherian
2026-07-15 5:34 ` [PATCH v3 2/6] arm64: cputype: Add C1-Nano definitions Linu Cherian
2026-07-15 5:34 ` [PATCH v3 3/6] arm64: cpufeature: Extend bbml2_noabort support list Linu Cherian
2026-07-15 6:06 ` Anshuman Khandual
2026-07-15 5:34 ` [PATCH v3 4/6] arm64: sysreg: Add BBM_3 Linu Cherian
2026-07-15 5:59 ` Anshuman Khandual
2026-07-15 5:34 ` [PATCH v3 5/6] arm64: cpufeature: Rename BBML2_NOABORT as BBML3 Linu Cherian
2026-07-15 6:29 ` Anshuman Khandual
2026-07-15 5:34 ` [PATCH v3 6/6] arm64: cpufeature: Detect BBML3 based on ID_AA64MMFR2_EL1.BBM Linu Cherian
2026-07-15 6:40 ` Anshuman Khandual
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