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Wed, 15 Jul 2026 04:01:24 -0700 (PDT) Received: from i386.168.1.127 ([2402:a00:163:2ce9:6882:91b7:8e79:7958]) by smtp.gmail.com with ESMTPSA id 956f58d0204a3-6681fbd8c5esm59066d50.3.2026.07.15.04.01.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 15 Jul 2026 04:01:23 -0700 (PDT) From: Hrushiraj Gandhi To: srini@kernel.org Cc: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, heiko@sntech.de, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, Hrushiraj Gandhi Subject: [PATCH 1/2] dt-bindings: nvmem: rockchip-efuse: add rockchip,efuse-write-enable property Date: Wed, 15 Jul 2026 16:31:06 +0530 Message-ID: <20260715110107.409204-2-hrushirajg23@gmail.com> X-Mailer: git-send-email 2.47.3 In-Reply-To: <20260715110107.409204-1-hrushirajg23@gmail.com> References: <20260715110107.409204-1-hrushirajg23@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260715_040125_993165_80A161B4 X-CRM114-Status: GOOD ( 10.11 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add an optional boolean property to explicitly opt in to write (OTP programming) support. eFuse bits are one-time-programmable and permanently set once written; write support must therefore not be enabled by default on arbitrary boards. Boards that intend to use software-initiated eFuse programming (e.g. factory key provisioning) must declare this property and must ensure the required VQPS programming supply (1.8V to 1.98V per RK3399 TRM) is present and correctly sequenced during writes. Signed-off-by: Hrushiraj Gandhi --- .../devicetree/bindings/nvmem/rockchip-efuse.yaml | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/Documentation/devicetree/bindings/nvmem/rockchip-efuse.yaml b/Documentation/devicetree/bindings/nvmem/rockchip-efuse.yaml index b80fd8d1ae5b..8a7195245c84 100644 --- a/Documentation/devicetree/bindings/nvmem/rockchip-efuse.yaml +++ b/Documentation/devicetree/bindings/nvmem/rockchip-efuse.yaml @@ -46,6 +46,17 @@ properties: this property is defined. $ref: /schemas/types.yaml#/definitions/uint32 + rockchip,efuse-write-enable: + type: boolean + description: + Enable write (programming) support for this eFuse block. eFuse bits + are one-time-programmable; setting a bit is permanent and cannot be + undone. This property must only be set on boards where irreversible + OTP programming from software is an intended use case (e.g. factory + provisioning), and where the required VQPS programming voltage + (1.8V to 1.98V per RK3399 TRM) is guaranteed to be present and + correctly sequenced by the board's power design during writes. + required: - compatible - reg -- 2.47.3