[PATCH v3 0/2] arm64: dts: rockchip: Add ArmSoM CM5 and CM5-IO

[Jiaxing Hu <gahing@gahingwoo.com>]

Add mainline support for the ArmSoM CM5, an RK3576 compute module, and
its CM5-IO carrier board.

Patch 1 adds the binding, patch 2 the module dtsi and the carrier dts.

The on-module YT8531 PHY has no crystal and needs the SoC 25 MHz
reference clock (clk_mac_refout). Ungating it for RGMII needs a small
dwmac-rk change sent separately to netdev [1]; the clock is optional so
this DTS applies without it.

Tested on a CM5-IO: the YT8531 is probed by the motorcomm driver and the
link comes up at 1000 Mbit/s; RK806, HYM8563, eMMC, microSD, the USB3
hub and the PCIe root complex all probe. dtbs_check is clean.

Changes in v3:
- Remove the ES8388 codec from the file header and the i2c0 block
  comment. The node was dropped in v2 but the comments still named it
  (sashiko-bot on v2).
- Use gpios instead of gpio in the vcc_3v3_pcie fixed regulator, to
  match the other regulators in the file.
- Pick up Krzysztof's Acked-by on patch 1.
- The other v2 review notes need no change: the always-on plus
  off-in-suspend state on vdd_cpu_lit_s0 and vdd_gpu_s0 matches every
  rk3576 board upstream, and the eMMC full-pwr-cycle-in-suspend with no
  vmmc-supply is the same pattern used across rk3576. dtbs_check stays
  clean.

Changes in v2:
- Type-C DP alt-mode: name the altmodes child "displayport" and make
  svid a /bits/ 16 value; drop the undocumented svid from &usbdp_phy and
  add the missing mode-switch.
- Move the FUSB302 role-switch endpoint into the connector's ports; the
  fusb302 binding does not allow a port on the device node. Rename the
  node to usb-typec@22.
- Drop the ES8388 node (disabled, wrong compatible) and the unreferenced
  gmac0_rst, bt_reg_on and wifi_host_wake_irq pinctrls.
- Rename the wifi-poweren-gpio pinctrl node, it collided with
  gpio-consumer.yaml.
- Describe the PHY reset at the MDIO bus level rather than with the
  deprecated snps,reset-gpios; a per-PHY reset-gpios is applied only
  after the ID scan, too late for a PHY that boots held in reset.

[1] net: stmmac: dwmac-rk: enable the reference clock for output mode

Jiaxing Hu (2):
  dt-bindings: arm: rockchip: Add ArmSoM CM5 and CM5-IO
  arm64: dts: rockchip: Add ArmSoM CM5 and CM5-IO

 .../devicetree/bindings/arm/rockchip.yaml     |   7 +
 arch/arm64/boot/dts/rockchip/Makefile         |   1 +
 .../dts/rockchip/rk3576-armsom-cm5-io.dts     | 397 ++++++++++++
 .../boot/dts/rockchip/rk3576-armsom-cm5.dtsi  | 564 ++++++++++++++++++
 4 files changed, 969 insertions(+)
 create mode 100644 arch/arm64/boot/dts/rockchip/rk3576-armsom-cm5-io.dts
 create mode 100644 arch/arm64/boot/dts/rockchip/rk3576-armsom-cm5.dtsi

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2.43.0