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The previous node only mapped the last 4 KB (0x2201f000, 0x1000) which was used for the SCMI shared memory buffer. Update the base address and size to cover the full P2 region so it can also serve as a general purpose SRAM pool. Signed-off-by: Peng Fan --- arch/arm64/boot/dts/freescale/imx8ulp.dtsi | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi index cb0d73327d86c..7d00fe8360948 100644 --- a/arch/arm64/boot/dts/freescale/imx8ulp.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8ulp.dtsi @@ -154,17 +154,17 @@ sosc: clock-sosc { #clock-cells = <0>; }; - sram@2201f000 { + sram@22010000 { compatible = "mmio-sram"; - reg = <0x0 0x2201f000 0x0 0x1000>; + reg = <0x0 0x22010000 0x0 0x10000>; #address-cells = <1>; #size-cells = <1>; - ranges = <0 0x0 0x2201f000 0x1000>; + ranges = <0 0x0 0x22010000 0x10000>; - scmi_buf: scmi-sram-section@0 { + scmi_buf: scmi-sram-section@f000 { compatible = "arm,scmi-shmem"; - reg = <0x0 0x400>; + reg = <0xf000 0x400>; }; }; -- 2.34.1