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[61.228.16.100]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-2cf344f61ffsm54900325ad.33.2026.07.20.03.40.41 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 20 Jul 2026 03:40:43 -0700 (PDT) From: Shih-Yuan Lee To: Mark Brown Cc: Andy Shevchenko , Daniel Mack , Haojian Zhuang , Robert Jarzmik , linux-arm-kernel@lists.infradead.org, linux-spi@vger.kernel.org, linux-kernel@vger.kernel.org, Shih-Yuan Lee Subject: [PATCH v15 4/7] spi: pxa2xx: lock out runtime autosuspend for Intel LPSS SPI in PIO mode Date: Mon, 20 Jul 2026 18:40:26 +0800 Message-Id: <20260720104029.13740-5-fourdollars@debian.org> X-Mailer: git-send-email 2.39.5 In-Reply-To: <20260720104029.13740-1-fourdollars@debian.org> References: <20260720104029.13740-1-fourdollars@debian.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260720_034046_121276_59E26E0E X-CRM114-Status: GOOD ( 11.11 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org When operating in PIO mode on Intel LPSS SPI controllers, runtime PM autosuspend clock-gates the hardware block when idle. On subsequent transfers, MMIO accesses to trigger resume are performed before the runtime PM state machine can wake the controller, causing PCIe Completion Timeouts. This issue does not affect DMA mode, where the DMA engine holds the required resources, nor does it affect non-LPSS controllers. Lock out runtime PM autosuspend for LPSS SPI controllers specifically when operating in PIO mode. Acquire a runtime PM reference via pm_runtime_get_noresume() in pxa2xx_spi_probe() after registration, and release it via pm_runtime_put_sync() in pxa2xx_spi_remove() to ensure the runtime PM state machine transitions to RPM_SUSPENDED upon driver unbind, preventing active child count leaks on the parent LPSS power domain. Signed-off-by: Shih-Yuan Lee --- drivers/spi/spi-pxa2xx.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/drivers/spi/spi-pxa2xx.c b/drivers/spi/spi-pxa2xx.c index 64b5ec744756..88ed28096b07 100644 --- a/drivers/spi/spi-pxa2xx.c +++ b/drivers/spi/spi-pxa2xx.c @@ -1473,6 +1473,9 @@ int pxa2xx_spi_probe(struct device *dev, struct ssp_device *ssp, goto out_error_irq_alloc; } + if (is_lpss_ssp(drv_data) && !platform_info->enable_dma) + pm_runtime_get_noresume(dev); + return status; out_error_irq_alloc: @@ -1513,6 +1516,8 @@ void pxa2xx_spi_remove(struct device *dev) /* Release DMA */ if (drv_data->controller_info->enable_dma) pxa2xx_spi_dma_release(drv_data); + else if (is_lpss_ssp(drv_data)) + pm_runtime_put_sync(dev); } EXPORT_SYMBOL_NS_GPL(pxa2xx_spi_remove, "SPI_PXA2xx"); -- 2.39.5