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Mon, 20 Jul 2026 14:06:31 +0000 (GMT) From: Aman Priyadarshi To: catalin.marinas@arm.com, will@kernel.org Cc: Jason@zx2c4.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Aman Priyadarshi , Ard Biesheuvel Subject: [PATCH] arm64: archrandom: avoid trapping ID register read in __cpu_has_rng() Date: Mon, 20 Jul 2026 15:06:15 +0100 Message-id: <20260720140615.99343-1-amanp@apple.com> X-Mailer: git-send-email 2.54.0 MIME-version: 1.0 Content-transfer-encoding: 8bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260720_070920_254279_BDC5E8FF X-CRM114-Status: GOOD ( 16.06 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org __cpu_has_rng() has an early-boot fallback, taken before the ARM64_HAS_RNG alternative is patched, that calls this_cpu_has_cap(ARM64_HAS_RNG). With SCOPE_LOCAL_CPU that resolves the capability by reading ID_AA64ISAR0_EL1 directly from hardware via __read_sysreg_by_encoding(), on every invocation. Until the CRNG is seeded, crng_make_state() routes every get_random_*() through extract_entropy(), which drains architectural entropy via arch_get_random_seed_longs()/arch_get_random_longs() and so calls __cpu_has_rng() several times per request. On a direct (non-EFI) boot there is no bootloader seed, so the CRNG stays unseeded for much of boot and essentially every early randomness consumer takes this path. Under virtualization this is costly: the hypervisor traps guest accesses to the ID registers (HCR_EL2.TID3), making each read a vmexit, producing ~200k trapped ID_AA64ISAR0_EL1 reads during boot. The register value is invariant, so read the sanitised feature register instead. read_sanitised_ftr_reg() returns the cached value from arm64_ftr_regs[] with no sysreg access, and hence no trap. That array is populated by cpuinfo_store_boot_cpu() in smp_prepare_boot_cpu(), before the first early RNG use in random_init_early(), so it is always valid here. With this change the trapped reads drop from ~200k to handful number of times, and the boot time drops roughly by 6.3% in the test environment. Fixes: 2c03e16f4499 ("random: remove early archrandom abstraction") Cc: Jason A. Donenfeld Cc: Ard Biesheuvel Cc: Will Deacon Signed-off-by: Aman Priyadarshi --- arch/arm64/include/asm/archrandom.h | 18 ++++++++++++++++-- 1 file changed, 16 insertions(+), 2 deletions(-) diff --git a/arch/arm64/include/asm/archrandom.h b/arch/arm64/include/asm/archrandom.h index 8babfbe31f95..8067e9a35641 100644 --- a/arch/arm64/include/asm/archrandom.h +++ b/arch/arm64/include/asm/archrandom.h @@ -61,8 +61,22 @@ static inline bool __arm64_rndrrs(unsigned long *v) static __always_inline bool __cpu_has_rng(void) { - if (unlikely(!system_capabilities_finalized() && !preemptible())) - return this_cpu_has_cap(ARM64_HAS_RNG); + if (unlikely(!system_capabilities_finalized() && !preemptible())) { + /* + * Until the ARM64_HAS_RNG alternative is patched we can't use + * the static-branch form, so consult the feature register + * directly. Don't use this_cpu_has_cap() here: it reads + * ID_AA64ISAR0_EL1 from hardware on every call, under + * virtualization each ID register read traps to the hypervisor + * (HCR_EL2.TID3) -- producing a storm of vmexits during boot. + * The sanitised value is cached in memory. + */ + u64 isar0 = read_sanitised_ftr_reg(SYS_ID_AA64ISAR0_EL1); + + return cpuid_feature_extract_unsigned_field(isar0, + ID_AA64ISAR0_EL1_RNDR_SHIFT) >= + ID_AA64ISAR0_EL1_RNDR_IMP; + } return alternative_has_cap_unlikely(ARM64_HAS_RNG); } -- 2.54.0 (Apple Git-156)