Re: [PATCH v2 3/6] dt-bindings: soc: rockchip: grf: Add RV1106 compatibles

[Krzysztof Kozlowski <krzk@kernel.org>]

On Tue, Jul 14, 2026 at 01:36:40PM -0600, Simon Glass wrote:
> Add the compatibles for the general register files of the Rockchip
> RV1106: the main GRF, and the per-bank GPIO IOC blocks used by the pin
> controller.
> 
> Signed-off-by: Simon Glass <sjg@chromium.org>
> ---
> 
> Changes in v2:
> - Drop the grf-cru clock-controller child and use the syscon-only
>   group for the main GRF, since the CRU now provides the MMC phase
>   clocks
> - Use a single gpio-ioc compatible for the per-bank IOC blocks in
>   place of the ioc and pmuioc regions
> 
>  Documentation/devicetree/bindings/soc/rockchip/grf.yaml | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/soc/rockchip/grf.yaml b/Documentation/devicetree/bindings/soc/rockchip/grf.yaml
> index 2cc43742b8e3..fd9235ac1334 100644
> --- a/Documentation/devicetree/bindings/soc/rockchip/grf.yaml
> +++ b/Documentation/devicetree/bindings/soc/rockchip/grf.yaml
> @@ -64,6 +64,8 @@ properties:
>                - rockchip,rk3588-vo1-grf
>                - rockchip,rk3588-vop-grf
>                - rockchip,rv1103b-ioc
> +              - rockchip,rv1106-gpio-ioc

And this also answers my previous email (pinctrl/gpio bank): you have
one GPIO IOC, not multiple ones, although commit msg tells different
story. Confusing. The compatible here defines register layout (see
writing bindings - it is explicitly documented there) so do you have one
device or multiple with the same register layout?

Best regards,
Krzysztof