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Sun, 26 Jul 2026 19:11:08 -0700 (PDT) Received: from attina.synaptics-inc.local ([199.33.119.15]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-13e53094d65sm19162200c88.13.2026.07.26.19.10.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 26 Jul 2026 19:11:07 -0700 (PDT) From: Gavin Gao To: andrew+netdev@lunn.ch, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, heiko@sntech.de Cc: robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, mcoquelin.stm32@gmail.com, alexandre.torgue@foss.st.com, richardcochran@gmail.com, nicolas.frattaroli@collabora.com, sebastian.reichel@collabora.com, sashal@kernel.org, alchark@gmail.com, chaoyi.chen@rock-chips.com, attinagaoxu@gmail.com, amadeus@jmu.edu.cn, rmk+kernel@armlinux.org.uk, horms@kernel.org, alok.a.tiwari@oracle.com, david.wu@rock-chips.com, netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com Subject: [PATCH net-next 1/3] dt-bindings: net: rockchip-dwmac: Add 25M refout clock Date: Mon, 27 Jul 2026 10:10:45 +0800 Message-ID: <20260727021048.3375444-2-attinagaoxu@gmail.com> X-Mailer: git-send-email 2.55.0 In-Reply-To: <20260727021048.3375444-1-attinagaoxu@gmail.com> References: <20260727021048.3375444-1-attinagaoxu@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260726_191109_127123_8917B054 X-CRM114-Status: UNSURE ( 9.60 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Some Rockchip GMAC instances can provide a 25 MHz reference clock output for an external RGMII PHY. Add a clock name for this 25 MHz reference output so SoC dtsi files can describe it separately from the existing MAC reference clocks. Signed-off-by: Gavin Gao --- Documentation/devicetree/bindings/net/rockchip-dwmac.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/net/rockchip-dwmac.yaml b/Documentation/devicetree/bindings/net/rockchip-dwmac.yaml index 0ac7c4b47d6b..074ac274f2e0 100644 --- a/Documentation/devicetree/bindings/net/rockchip-dwmac.yaml +++ b/Documentation/devicetree/bindings/net/rockchip-dwmac.yaml @@ -81,6 +81,7 @@ properties: - pclk_mac - clk_mac_ref - clk_mac_refout + - clk_mac_25m_refout - clk_mac_speed clock_in_out: -- 2.55.0