From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 816E5C53219 for ; Mon, 27 Jul 2026 12:27:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date :Subject:To:From:Reply-To:Cc:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=NAF5Cwtfl6/DaeUfOhwOO/uj01Zpijtulj5n6E3H/Hc=; b=pL8QgBQvg/Yb/aWmBJsf4VVNQu Q5qbQI07bwqXNmn7czgqpJgsa81YqWHqZhV+mwP2QPvZMDEbLSqZVNKkhBmjAfm4uiQ87+gn5MozL oVim3yy+lMThSV33FTCWm+WQlxjXNzaGckzo+tpsgUp+lpOQXWRf74taZoWDDJvgD61mGJigOCGjn Zb09tPkJgwfwlqHKD05tE0Y12kaKFvu2P9aSHv7qgkw8DbEHzfHCgGwndLUstgnzOJZyp7OE+8L05 NTaZZMt6JqEUOy/fcXpsaO88TJUgV59ZYjWwEvbkLU5WXODo2M8cCwDqHEka7G1B4jIMquHA7eIXR rtZCCc9Q==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.99.1 #2 (Red Hat Linux)) id 1woKQi-00000002g9u-1y0A; Mon, 27 Jul 2026 12:27:36 +0000 Received: from esa.microchip.iphmx.com ([68.232.153.233]) by bombadil.infradead.org with esmtps (Exim 4.99.1 #2 (Red Hat Linux)) id 1woKQV-00000002g22-3Tfv for linux-arm-kernel@lists.infradead.org; Mon, 27 Jul 2026 12:27:25 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1785155244; x=1816691244; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=pVFOZevFakd5Gm/92xP58/1LjCv/xOINaboGFg4D4bA=; b=HnMDToaPTnHmKCe8fSpM012mPNDah68RKeN8Mr+ZH7bh4e0jqZ3ehoWP 9+jJV+C0r3h1Lck1+QnIKq+fssR9/ZtGYYJ9P3dTPuJD7H6vP6FjriPBL aP9cH393OLvb3Gk8TGliUzVjveRorQL0j1LIqWB/Br+Bk98hSl1Sas5vA nIWiB8+RrqusneH53W1F16L3hCrkZIwq9icsWa86OCm3mRHHBUCwY/m4T oYWbNqqSA/OFZhAfeP9ESSTkA5bi4KukbIZXSldMmtou9GsU7YcmABfk/ 4W7HidPZXmIYZrA/N4dO7d0PvDKexigwH44ASWgXmf+1H+3TnyWEJaMhJ Q==; X-CSE-ConnectionGUID: Ezh773ZLSHaPRd+fUiBaaQ== X-CSE-MsgGUID: J+cO06IDTlaeVHEF/uittw== X-IronPort-AV: E=Sophos;i="6.25,188,1779174000"; d="scan'208";a="292591670" X-Amp-Result: SKIPPED(no attachment in message) Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa5.microchip.iphmx.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Jul 2026 05:27:20 -0700 Received: from chn-vm-ex01.mchp-main.com (10.10.87.71) by chn-vm-ex4.mchp-main.com (10.10.87.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.2.2562.43; Mon, 27 Jul 2026 05:27:19 -0700 Received: from che-ll-i67070.microchip.com (10.10.85.11) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server id 15.1.2507.58 via Frontend Transport; Mon, 27 Jul 2026 05:27:08 -0700 From: Varshini Rajendran To: , , , , , , , , , , , , , , , , , , , , , , , , Subject: [PATCH v4 03/16] iio: adc: at91-sama5d2_adc: rework temp calibration layout handling Date: Mon, 27 Jul 2026 17:56:20 +0530 Message-ID: <20260727122633.117435-4-varshini.rajendran@microchip.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260727122633.117435-1-varshini.rajendran@microchip.com> References: <20260727122633.117435-1-varshini.rajendran@microchip.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260727_052723_876972_0A6364C4 X-CRM114-Status: GOOD ( 19.74 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Extend support to handle different temperature calibration layouts. Add a temperature calibration data layout structure to describe indexes of the factors P1, P4, P6, tag, minimum length of the packet and the scaling factors for P1 (p1_scale) which are SoC-specific instead of the older non scalable id structure. This helps handle the differences in the same function flow and prepare the calibration data to be applied. Signed-off-by: Varshini Rajendran --- drivers/iio/adc/at91-sama5d2_adc.c | 66 ++++++++++++++++++++++-------- 1 file changed, 48 insertions(+), 18 deletions(-) diff --git a/drivers/iio/adc/at91-sama5d2_adc.c b/drivers/iio/adc/at91-sama5d2_adc.c index 4a4a25f3c715..798e4d60bf69 100644 --- a/drivers/iio/adc/at91-sama5d2_adc.c +++ b/drivers/iio/adc/at91-sama5d2_adc.c @@ -16,6 +16,7 @@ #include #include #include +#include #include #include #include @@ -446,6 +447,27 @@ static const struct at91_adc_reg_layout sama7g5_layout = { #define at91_adc_writel(st, reg, val) \ writel_relaxed(val, (st)->base + (st)->soc_info.platform->layout->reg) +/* Temperature calibration tag "ACST" in ASCII */ +#define AT91_TEMP_CALIB_TAG_ACST 0x41435354 + +/** + * struct at91_adc_temp_calib_layout - temperature calibration packet layout + * @tag_idx: index of Packet tag in the NVMEM cell buffer + * @p1_idx: index of FT1_TEMP, equivalent to P1 in the NVMEM cell buffer + * @p4_idx: index of FT1_VPAT, equivalent to P4 in the NVMEM cell buffer + * @p6_idx: index of FT2_VBG, equivalent to P6 in the NVMEM cell buffer + * @min_len: minimum number of u32 words expected in the NVMEM cell buffer + * @p1_scale: scaling factor applied to P1 to convert to millicelcius + */ +struct at91_adc_temp_calib_layout { + unsigned int tag_idx; + unsigned int p1_idx; + unsigned int p4_idx; + unsigned int p6_idx; + unsigned int min_len; + struct u32_fract p1_scale; +}; + /** * struct at91_adc_platform - at91-sama5d2 platform information struct * @layout: pointer to the reg layout struct @@ -464,6 +486,7 @@ static const struct at91_adc_reg_layout sama7g5_layout = { * @oversampling_avail_no: number of available oversampling values * @chan_realbits: realbits for registered channels * @temp_chan: temperature channel index + * @temp_calib_layout: temperature calibration packet layout * @temp_sensor: temperature sensor supported */ struct at91_adc_platform { @@ -481,6 +504,7 @@ struct at91_adc_platform { unsigned int oversampling_avail_no; unsigned int chan_realbits; unsigned int temp_chan; + const struct at91_adc_temp_calib_layout *temp_calib_layout; bool temp_sensor; }; @@ -497,18 +521,13 @@ struct at91_adc_temp_sensor_clb { u32 p6; }; -/** - * enum at91_adc_ts_clb_idx - calibration indexes in NVMEM buffer - * @AT91_ADC_TS_CLB_IDX_P1: index for P1 - * @AT91_ADC_TS_CLB_IDX_P4: index for P4 - * @AT91_ADC_TS_CLB_IDX_P6: index for P6 - * @AT91_ADC_TS_CLB_IDX_MAX: max index for temperature calibration packet in OTP - */ -enum at91_adc_ts_clb_idx { - AT91_ADC_TS_CLB_IDX_P1 = 2, - AT91_ADC_TS_CLB_IDX_P4 = 5, - AT91_ADC_TS_CLB_IDX_P6 = 7, - AT91_ADC_TS_CLB_IDX_MAX = 19, +static const struct at91_adc_temp_calib_layout sama7g5_temp_calib = { + .tag_idx = 1, + .p1_idx = 2, + .p4_idx = 5, + .p6_idx = 7, + .min_len = 19, + .p1_scale = { .numerator = 1000, .denominator = 1 }, }; /* Temperature sensor calibration - Vtemp voltage sensitivity to temperature. */ @@ -746,6 +765,7 @@ static const struct at91_adc_platform sama7g5_platform = { .chan_realbits = 16, .temp_sensor = true, .temp_chan = AT91_SAMA7G5_ADC_TEMP_CHANNEL, + .temp_calib_layout = &sama7g5_temp_calib, }; static int at91_adc_chan_xlate(struct iio_dev *indio_dev, int chan) @@ -2251,11 +2271,18 @@ static int at91_adc_temp_sensor_init(struct at91_adc_state *st, struct device *dev) { struct at91_adc_temp_sensor_clb *clb = &st->soc_info.temp_sensor_clb; + const struct at91_adc_temp_calib_layout *layout; size_t len; if (!st->soc_info.platform->temp_sensor) return 0; + layout = st->soc_info.platform->temp_calib_layout; + if (!layout) + return -ENODEV; + if (!layout->p1_scale.denominator) + return -EINVAL; + /* Get the calibration data from NVMEM. */ struct nvmem_cell *temp_calib __free(nvmem_cell_put) = nvmem_cell_get(dev, "temperature_calib"); @@ -2270,20 +2297,23 @@ static int at91_adc_temp_sensor_init(struct at91_adc_state *st, return dev_err_probe(dev, PTR_ERR(buf), "Failed to read calibration data!\n"); - if (len < AT91_ADC_TS_CLB_IDX_MAX * sizeof(*buf)) { + if (len < layout->min_len * sizeof(*buf)) { dev_err(dev, "Invalid calibration data!\n"); return -EINVAL; } /* Store calibration data for later use. */ - clb->p1 = buf[AT91_ADC_TS_CLB_IDX_P1]; - clb->p4 = buf[AT91_ADC_TS_CLB_IDX_P4]; - clb->p6 = buf[AT91_ADC_TS_CLB_IDX_P6]; + clb->p1 = buf[layout->p1_idx]; + clb->p4 = buf[layout->p4_idx]; + clb->p6 = buf[layout->p6_idx]; /* - * We prepare here the conversion to milli to avoid doing it on hotpath. + * Here we prepare the conversion to milli to avoid doing it on hotpath. + * The p1 value is multiplied and divided with a scaling factor as per + * the SoC storage format described by per-platform calibration layout. */ - clb->p1 = clb->p1 * 1000; + clb->p1 *= layout->p1_scale.numerator; + clb->p1 /= layout->p1_scale.denominator; return 0; } -- 2.34.1