From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D3B8CC53219 for ; Tue, 28 Jul 2026 14:29:38 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date :Subject:CC:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=RAhQ6AVspmWRAEnAWigTsiPMmdSDeRmCjuB4RuD3r34=; b=aCortQ6S9tP7tzVS7KKG6uzUrs CUT66z+IaHuWA/zW2Qjg8nqJ1kxsIdsqHywkX9K+gY/OVhtADt7nx5NYhetFS+Lc7wyERFgaZbZY3 xBCx9G6uDIxpHmH3ax5tJgfLoktPmpR8UrPc49EBMyTE9dpX+HJi0ER14ua0pwDzdCkEIrM4lphQ7 mNKbz+XF3T2iTlC/s2blKtSfbgOoBdLZ3XjTN+cP1pZCDHgiKjbG1fgUK+B5UjIZL+FbqJe725hle 3b/lcyN4b4qjCZdIpUN8g5MiKR7orHHOdxkI4tk7rb1IJG7euonEQMpLqoLmapnQduZLUviT1A64z ZJSFyNrg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.99.1 #2 (Red Hat Linux)) id 1woioC-00000005U4V-0kOz; Tue, 28 Jul 2026 14:29:28 +0000 Received: from desiato.infradead.org ([2001:8b0:10b:1:d65d:64ff:fe57:4e05]) by bombadil.infradead.org with esmtps (Exim 4.99.1 #2 (Red Hat Linux)) id 1woinx-00000005TyY-1dFX; Tue, 28 Jul 2026 14:29:13 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=desiato.20200630; h=Content-Type:Content-Transfer-Encoding :MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From: Sender:Reply-To:Content-ID:Content-Description; bh=RAhQ6AVspmWRAEnAWigTsiPMmdSDeRmCjuB4RuD3r34=; b=d+5Z62SPR2bY139ebSmy6cnZ0l GUKkIRzIDy1uT+Vnc64wb2N6yBfal8DYMwSJQBEKRHNMS3vXljrSuIuKnDnbgoOSp7xpMTWlRkuLV 7NZUauIBkYFtbsrTz2hHAFBtugvYGb7qWltyIBb1Upd7V+G7141WZ2vXRpOikvdMLy4TWJb705rQC 8blnI1kakZSVSQISuGD3UkOq3m1Yo7m3ohUqLRuPzySkNqvCDx/6LEnQUsDXWht+dXYS7LIEtwoQI djmKnAZ+imOedvBq/QB7RdDz3mfqqVMERLKX4FrJSV9YRovNLQfJ+wcSFnXTb1GbEEyu1EH1JI7Qb 47U8Dbag==; Received: from rtits2.realtek.com ([211.75.126.72] helo=rtits2.realtek.com.tw) by desiato.infradead.org with esmtps (Exim 4.99.2 #2 (Red Hat Linux)) id 1woinq-000000051Ai-2FIw; Tue, 28 Jul 2026 14:29:12 +0000 X-SpamFilter-By: ArmorX SpamTrap 5.80 with qID 66SES79P03929840, This message is accepted by code: ctloc85258 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=realtek.com; s=dkim; t=1785248887; bh=RAhQ6AVspmWRAEnAWigTsiPMmdSDeRmCjuB4RuD3r34=; h=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version:Content-Transfer-Encoding:Content-Type; b=JahPwqHvkcdGOlj77jRF2z3G5UL/0FkbV0r4VK3SWL35HJ55lzarQ4BDRlvLNtH1V D4O//oennusRxSQhg2t6EE8JOL+Yc8t7ePjvzfsR5YdS66oJcXYWavrIEcaAPajFcy peFYNG43P/Azuhf5gWymTQRZQjPlb3FqPsRtm9zK8Fr5fui1O0iTHbcfgutXld/n4Q lxaEs8/UKxx+cIw5Q5U0QmnTGTHWgcmNWtQ5x8EC1jPW8P6GlpUz/szJFNAC3LrL/W Kr+TIwWyqLtE6dLvec928iPIylUVH+0aOFHfYdfjub2srFPXDkitCxkVh0SAtNpdRK Qi6viKgRfGAEQ== Received: from mail.realtek.com (rtkexhmbs03.realtek.com.tw[10.21.1.53]) by rtits2.realtek.com.tw (8.15.2/3.29/5.94) with ESMTPS id 66SES79P03929840 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=FAIL); Tue, 28 Jul 2026 22:28:07 +0800 Received: from RTKEXHMBS05.realtek.com.tw (10.21.1.55) by RTKEXHMBS03.realtek.com.tw (10.21.1.53) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.17; Tue, 28 Jul 2026 22:28:07 +0800 Received: from cn1dhc-k02 (172.21.252.101) by RTKEXHMBS05.realtek.com.tw (10.21.1.55) with Microsoft SMTP Server id 15.2.2562.17 via Frontend Transport; Tue, 28 Jul 2026 22:28:07 +0800 From: Yu-Chun Lin To: , , , , , , , , CC: , , , , , , , , , Subject: [PATCH v11 06/11] clk: realtek: Add support for gate clock Date: Tue, 28 Jul 2026 22:28:01 +0800 Message-ID: <20260728142806.1954638-7-eleanor.lin@realtek.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20260728142806.1954638-1-eleanor.lin@realtek.com> References: <20260728142806.1954638-1-eleanor.lin@realtek.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260728_152907_501173_043DAC5C X-CRM114-Status: GOOD ( 16.79 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Cheng-Yu Lee Introduce clk_regmap_gate_ops supporting enable, disable, is_enabled, and for standard regmap gate clocks. Add clk_regmap_gate_ro_ops as a read-only variant exposing only is_enabled. Signed-off-by: Cheng-Yu Lee Co-developed-by: Yu-Chun Lin Signed-off-by: Yu-Chun Lin --- Changes in v11: - Add 'rtk_' prefix into struct names and function names. --- drivers/clk/realtek/Makefile | 1 + drivers/clk/realtek/clk-regmap-gate.c | 70 +++++++++++++++++++++++++++ drivers/clk/realtek/clk-regmap-gate.h | 65 +++++++++++++++++++++++++ 3 files changed, 136 insertions(+) create mode 100644 drivers/clk/realtek/clk-regmap-gate.c create mode 100644 drivers/clk/realtek/clk-regmap-gate.h diff --git a/drivers/clk/realtek/Makefile b/drivers/clk/realtek/Makefile index 71edc18121c6..90c0658a83bf 100644 --- a/drivers/clk/realtek/Makefile +++ b/drivers/clk/realtek/Makefile @@ -4,3 +4,4 @@ obj-$(CONFIG_RTK_CLK_COMMON) += clk-rtk.o clk-rtk-y += clk-rtk-common.o clk-rtk-y += clk-pll.o clk-rtk-y += freq_table.o +clk-rtk-y += clk-regmap-gate.o diff --git a/drivers/clk/realtek/clk-regmap-gate.c b/drivers/clk/realtek/clk-regmap-gate.c new file mode 100644 index 000000000000..8260e85a2cd1 --- /dev/null +++ b/drivers/clk/realtek/clk-regmap-gate.c @@ -0,0 +1,70 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (C) 2017-2026 Realtek Semiconductor Corporation + * Author: Cheng-Yu Lee + */ + +#include +#include +#include +#include +#include "clk-regmap-gate.h" + +static int rtk_clk_regmap_gate_enable(struct clk_hw *hw) +{ + struct rtk_clk_regmap_gate *clkg = to_rtk_clk_regmap_gate(hw); + unsigned int mask; + unsigned int val; + + mask = BIT(clkg->bit_idx); + val = BIT(clkg->bit_idx); + + if (clkg->write_en) { + mask |= BIT(clkg->bit_idx + 1); + val |= BIT(clkg->bit_idx + 1); + } + + return regmap_update_bits(clkg->clkr.regmap, clkg->gate_ofs, mask, val); +} + +static void rtk_clk_regmap_gate_disable(struct clk_hw *hw) +{ + struct rtk_clk_regmap_gate *clkg = to_rtk_clk_regmap_gate(hw); + unsigned int mask; + unsigned int val; + + mask = BIT(clkg->bit_idx); + val = 0; + + if (clkg->write_en) { + mask |= BIT(clkg->bit_idx + 1); + val |= BIT(clkg->bit_idx + 1); + } + + regmap_update_bits(clkg->clkr.regmap, clkg->gate_ofs, mask, val); +} + +static int rtk_clk_regmap_gate_is_enabled(struct clk_hw *hw) +{ + struct rtk_clk_regmap_gate *clkg = to_rtk_clk_regmap_gate(hw); + int ret; + u32 val; + + ret = regmap_read(clkg->clkr.regmap, clkg->gate_ofs, &val); + if (ret < 0) + return ret; + + return !!(val & BIT(clkg->bit_idx)); +} + +const struct clk_ops rtk_clk_regmap_gate_ops = { + .enable = rtk_clk_regmap_gate_enable, + .disable = rtk_clk_regmap_gate_disable, + .is_enabled = rtk_clk_regmap_gate_is_enabled, +}; +EXPORT_SYMBOL_NS_GPL(rtk_clk_regmap_gate_ops, "REALTEK_CLK"); + +const struct clk_ops rtk_clk_regmap_gate_ro_ops = { + .is_enabled = rtk_clk_regmap_gate_is_enabled, +}; +EXPORT_SYMBOL_NS_GPL(rtk_clk_regmap_gate_ro_ops, "REALTEK_CLK"); diff --git a/drivers/clk/realtek/clk-regmap-gate.h b/drivers/clk/realtek/clk-regmap-gate.h new file mode 100644 index 000000000000..25611999040f --- /dev/null +++ b/drivers/clk/realtek/clk-regmap-gate.h @@ -0,0 +1,65 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Copyright (C) 2017-2026 Realtek Semiconductor Corporation + * Author: Cheng-Yu Lee + */ + +#ifndef __CLK_REALTEK_CLK_REGMAP_GATE_H +#define __CLK_REALTEK_CLK_REGMAP_GATE_H + +#include "clk-rtk-common.h" + +struct rtk_clk_regmap_gate { + struct rtk_clk_regmap clkr; + int gate_ofs; + u8 bit_idx; + u32 write_en : 1; +}; + +#define __rtk_clk_regmap_gate_hw(_p) __rtk_clk_regmap_hw(&(_p)->clkr) + +#define __RTK_CLK_REGMAP_GATE(_name, _parent, _ops, _flags, _ofs, _bit_idx, \ + _write_en) \ + struct rtk_clk_regmap_gate _name = { \ + .clkr.hw.init = CLK_HW_INIT(#_name, _parent, _ops, _flags), \ + .gate_ofs = _ofs, \ + .bit_idx = _bit_idx, \ + .write_en = _write_en, \ + } + +#define RTK_CLK_REGMAP_GATE(_name, _parent, _flags, _ofs, _bit_idx, _write_en) \ + __RTK_CLK_REGMAP_GATE(_name, _parent, &rtk_clk_regmap_gate_ops, _flags, _ofs, \ + _bit_idx, _write_en) + +#define RTK_CLK_REGMAP_GATE_RO(_name, _parent, _flags, _ofs, _bit_idx, _write_en) \ + __RTK_CLK_REGMAP_GATE(_name, _parent, &rtk_clk_regmap_gate_ro_ops, _flags, \ + _ofs, _bit_idx, _write_en) + +#define __RTK_CLK_REGMAP_GATE_NO_PARENT(_name, _ops, _flags, _ofs, _bit_idx, \ + _write_en) \ + struct rtk_clk_regmap_gate _name = { \ + .clkr.hw.init = CLK_HW_INIT_NO_PARENT(#_name, _ops, _flags), \ + .gate_ofs = _ofs, \ + .bit_idx = _bit_idx, \ + .write_en = _write_en, \ + } + +#define RTK_CLK_REGMAP_GATE_NO_PARENT(_name, _flags, _ofs, _bit_idx, _write_en) \ + __RTK_CLK_REGMAP_GATE_NO_PARENT(_name, &rtk_clk_regmap_gate_ops, _flags, _ofs, \ + _bit_idx, _write_en) + +#define RTK_CLK_REGMAP_GATE_NO_PARENT_RO(_name, _flags, _ofs, _bit_idx, _write_en) \ + __RTK_CLK_REGMAP_GATE_NO_PARENT(_name, &rtk_clk_regmap_gate_ro_ops, _flags, \ + _ofs, _bit_idx, _write_en) + +static inline struct rtk_clk_regmap_gate *to_rtk_clk_regmap_gate(struct clk_hw *hw) +{ + struct rtk_clk_regmap *clkr = to_rtk_clk_regmap(hw); + + return container_of(clkr, struct rtk_clk_regmap_gate, clkr); +} + +extern const struct clk_ops rtk_clk_regmap_gate_ops; +extern const struct clk_ops rtk_clk_regmap_gate_ro_ops; + +#endif /* __CLK_REALTEK_CLK_REGMAP_GATE_H */ -- 2.43.0