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Sun, 2 Aug 2026 04:54:39 -0400 (EDT) Date: Sun, 2 Aug 2026 10:54:37 +0200 From: Janne Grunau To: Sasha Finkelstein Cc: Sven Peter , Vinod Koul , Frank Li , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Martin =?utf-8?Q?Povi=C5=A1er?= , asahi@lists.linux.dev, linux-arm-kernel@lists.infradead.org, dmaengine@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v2 2/2] dmaengine: apple-admac: Add M3 generation ADMACs Message-ID: <20260802085437.GA806854@robin.jannau.net> References: <20260729-t603x-admac-v2-0-e4b2bb6ca45e@chaosmail.tech> <20260729-t603x-admac-v2-2-e4b2bb6ca45e@chaosmail.tech> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <20260729-t603x-admac-v2-2-e4b2bb6ca45e@chaosmail.tech> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260802_015444_372180_427EE95D X-CRM114-Status: GOOD ( 18.58 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Wed, Jul 29, 2026 at 01:46:35PM +0200, Sasha Finkelstein wrote: > The admacs present on t8122 and t603x SoCs need additional writes in > order to operate correctly. The exact purpose of this register > is unknown > > Signed-off-by: Sasha Finkelstein > --- > drivers/dma/apple-admac.c | 32 ++++++++++++++++++++++++++++++-- > 1 file changed, 30 insertions(+), 2 deletions(-) > > diff --git a/drivers/dma/apple-admac.c b/drivers/dma/apple-admac.c > index 14a5ee14a481..72ff677c8ce5 100644 > --- a/drivers/dma/apple-admac.c > +++ b/drivers/dma/apple-admac.c > @@ -39,10 +39,14 @@ > > #define FLAG_DESC_NOTIFY BIT(16) > > +#define T8122_UNK_28_VAL 0x200000 maybe BIT(21) > #define REG_TX_START 0x0000 > #define REG_TX_STOP 0x0004 > #define REG_RX_START 0x0008 > #define REG_RX_STOP 0x000c > +#define REG_UNK_28 0x0028 > +#define REG_UNK_2C 0x002c > #define REG_IMPRINT 0x0090 > #define REG_TX_SRAM_SIZE 0x0094 > #define REG_RX_SRAM_SIZE 0x0098 > @@ -127,6 +131,7 @@ struct admac_data { > struct mutex cache_alloc_lock; > struct admac_sram txcache, rxcache; > > + bool set_unk28; > int irq; > int irq_index; > int nchannels; > @@ -147,6 +152,10 @@ struct admac_tx { > struct list_head node; > }; > > +struct admac_hw { > + bool set_unk28; > +}; > + > static int admac_alloc_sram_carveout(struct admac_data *ad, > enum dma_transfer_direction dir, > u32 *out) > @@ -747,6 +756,11 @@ static int admac_device_config(struct dma_chan *chan, > u32 bus_width = readl_relaxed(ad->base + REG_BUS_WIDTH(adchan->no)) & > ~(BUS_WIDTH_WORD_SIZE | BUS_WIDTH_FRAME_SIZE); > > + if (ad->set_unk28) { > + writel_relaxed(T8122_UNK_28_VAL, ad->base + REG_UNK_28); > + writel_relaxed(T8122_UNK_28_VAL, ad->base + REG_UNK_2C); > + } can this be done in probe? This writes the same value for every channel without obvious way how the bit in those two registers can reset? If it needs to be done here a comment explaining why would be useful. If it can be done in probe we could avoid putting set_unk28 into struct admac_data. Janne