From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D327FC55184 for ; Tue, 4 Aug 2026 17:06:04 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:Cc:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id: Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-Id:Date :Subject:To:From:Reply-To:Content-Type:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=rB1Vds54pesGvS+52/PsissxFXLuvm+rt4wvFBzy7iY=; b=p4XxG+NUyN4ZAa cB6CmrdtLPGR+53yURY2odbuEidPxIOP2YkqJ+1T89EVvSLvwWh/ySvqor/iziOFmdAyg/K7PBsuu XcDvZwtFwGverCoXKXfjHOiyxyFfmbq9QlWTcOgkLD6le7ednFoW5LyNpgEYwE4sWd0woFCL21kN8 9N3B2fQuKMe9xO90B00rEsy2LsnmlBCVg4INCyJP8Vky63jMNLHsRrKMEX2qEBQDaP5Z128BrTea8 8riuQmLw70jUEgigWo32nIENX918gIdyWYd0NUiZ2G65clv63ovhT4tkRtpJSUmjmB3eWZQEQPwcF 9feu9dEUnNH1zY9XaTZw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.99.1 #2 (Red Hat Linux)) id 1wrIaP-00000002Q6E-3Whl; Tue, 04 Aug 2026 17:05:53 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.99.1 #2 (Red Hat Linux)) id 1wrIaM-00000002Q2c-2u6h for linux-arm-kernel@lists.infradead.org; Tue, 04 Aug 2026 17:05:51 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 63F74165C; Tue, 4 Aug 2026 10:05:45 -0700 (PDT) Received: from lakrids.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.121.207.14]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id E8F373F632; Tue, 4 Aug 2026 10:05:44 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1785863149; bh=Ph14XQoeBml11dnZAXW5vhIEKbB+/Ol0vCEdWO4uKMk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=N0PTo1de04WdZ2yd/zR0bNAKyC3FVNIQ4ghoeMcpmyFHEPolbhCyMnrbWLBzPtjsB rOC3silVHcA3guQHXtAbisZ4Kbin/7OYnGF7PwWS/cJxF61cSsTtI6OnkMxpBCLnNU xWYi+KBypxx1o58DbapUb3cBGiUz/qQFmENhaSTQ= From: Mark Rutland To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v2 08/20] arm64: percpu: Factor out percpu offset asm Date: Tue, 4 Aug 2026 18:04:51 +0100 Message-Id: <20260804170503.3513916-9-mark.rutland@arm.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20260804170503.3513916-1-mark.rutland@arm.com> References: <20260804170503.3513916-1-mark.rutland@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260804_100550_774787_5FAAE169 X-CRM114-Status: GOOD ( 11.75 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mark.rutland@arm.com, vladimir.murzin@arm.com, ryan.roberts@arm.com, peterz@infradead.org, catalin.marinas@arm.com, david.laight.linux@gmail.com, stable@vger.kernel.org, ruanjinjie@huawei.com, james.morse@arm.com, yang@os.amperecomputing.com, cl@gentwo.org, maz@kernel.org, david@kernel.org, ljs@kernel.org, will@kernel.org, ardb@kernel.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Depending on whether the kernel runs at EL1 or EL2, the percpu offset is stored in either TPIDR_EL1 or TPIDR_EL2, and __kern_my_cpu_offset() uses an ALTERNATIVE() sequence to read the relevant TPIDR_ELx. In subsequent patches we'll need to read the percpu offset in other assembly sequences. Factor the ALTERNATIVE sequence out of __kern_my_cpu_offset() into a new __KERN_ASM_CPU_OFFSET() macro so that we can share the code sequence. There should be no functional change as a result of this patch. Signed-off-by: Mark Rutland Reviewed-by: Jinjie Ruan Cc: Ada Couprie Diaz Cc: Ard Biesheuvel Cc: Catalin Marinas Cc: James Morse Cc: Marc Zyngier Cc: Peter Zijlstra Cc: Vladimir Murzin Cc: Will Deacon Cc: Yang Shi --- arch/arm64/include/asm/percpu.h | 15 ++++++++++----- 1 file changed, 10 insertions(+), 5 deletions(-) diff --git a/arch/arm64/include/asm/percpu.h b/arch/arm64/include/asm/percpu.h index 31193bcf89a2b..29f20c8748fe1 100644 --- a/arch/arm64/include/asm/percpu.h +++ b/arch/arm64/include/asm/percpu.h @@ -29,6 +29,11 @@ static inline unsigned long __hyp_my_cpu_offset(void) return read_sysreg(tpidr_el2); } +#define __KERN_ASM_CPU_OFFSET(dst) \ + ALTERNATIVE("mrs " dst ", tpidr_el1", \ + "mrs " dst ", tpidr_el2", \ + ARM64_HAS_VIRT_HOST_EXTN) + static inline unsigned long __kern_my_cpu_offset(void) { unsigned long off; @@ -37,11 +42,11 @@ static inline unsigned long __kern_my_cpu_offset(void) * We want to allow caching the value, so avoid using volatile and * instead use a fake stack read to hazard against barrier(). */ - asm(ALTERNATIVE("mrs %0, tpidr_el1", - "mrs %0, tpidr_el2", - ARM64_HAS_VIRT_HOST_EXTN) - : "=r" (off) : - "Q" (*(const unsigned long *)current_stack_pointer)); + asm( + __KERN_ASM_CPU_OFFSET("%0") + : "=r" (off) + : "Q" (*(const unsigned long *)current_stack_pointer) + ); return off; } -- 2.30.2