From: Judith Mendez <jm@ti.com>
To: Judith Mendez <jm@ti.com>, Nishanth Menon <nm@ti.com>,
Vignesh Raghavendra <vigneshr@ti.com>
Cc: Tero Kristo <kristo@kernel.org>, Rob Herring <robh@kernel.org>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
Moteen Shah <m-shah@ti.com>
Subject: [PATCH v2 1/4] arm64: dts: ti: k3-am64: Enable IO expander interrupt
Date: Tue, 4 Aug 2026 19:48:18 -0500 [thread overview]
Message-ID: <20260805004821.416613-2-jm@ti.com> (raw)
In-Reply-To: <20260805004821.416613-1-jm@ti.com>
On AM64 EVM and SK boards, MMC1_SDWP is used for IO expander interrupt,
remove from MMC1 pinmux node and setup as exp1 IO expander interrupt.
Signed-off-by: Judith Mendez <jm@ti.com>
---
arch/arm64/boot/dts/ti/k3-am642-evm.dts | 15 ++++++++++++++-
arch/arm64/boot/dts/ti/k3-am642-sk.dts | 15 ++++++++++++++-
2 files changed, 28 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/ti/k3-am642-evm.dts b/arch/arm64/boot/dts/ti/k3-am642-evm.dts
index bc4347cf71140..28fbaf134af4f 100644
--- a/arch/arm64/boot/dts/ti/k3-am642-evm.dts
+++ b/arch/arm64/boot/dts/ti/k3-am642-evm.dts
@@ -8,6 +8,7 @@
#include <dt-bindings/phy/phy.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/net/ti-dp83867.h>
#include "k3-am642.dtsi"
@@ -259,11 +260,17 @@ AM64X_IOPAD(0x0284, PIN_INPUT_PULLUP, 0) /* (L21) MMC1_DAT1 */
AM64X_IOPAD(0x0280, PIN_INPUT_PULLUP, 0) /* (K19) MMC1_DAT2 */
AM64X_IOPAD(0x027c, PIN_INPUT_PULLUP, 0) /* (K18) MMC1_DAT3 */
AM64X_IOPAD(0x0298, PIN_INPUT_PULLUP, 0) /* (D19) MMC1_SDCD */
- AM64X_IOPAD(0x029c, PIN_INPUT, 0) /* (C20) MMC1_SDWP */
AM64X_IOPAD(0x0290, PIN_INPUT, 0) /* MMC1_CLKLB */
>;
};
+ main_gpio1_ioexp_intr_pins_default: main-gpio1-ioexp-intr-default-pins {
+ pinctrl-single,pins = <
+ AM64X_IOPAD(0x029c, PIN_INPUT, 7) /* (C20) MMC1_SDWP.GPIO1_78 */
+ >;
+ bootph-all;
+ };
+
main_uart1_pins_default: main-uart1-default-pins {
pinctrl-single,pins = <
AM64X_IOPAD(0x0248, PIN_INPUT, 0) /* (D16) UART1_CTSn */
@@ -481,6 +488,12 @@ exp1: gpio@22 {
bootph-all;
compatible = "ti,tca6424";
reg = <0x22>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&main_gpio1_ioexp_intr_pins_default>;
+ interrupt-parent = <&main_gpio1>;
+ interrupts = <78 IRQ_TYPE_EDGE_FALLING>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
gpio-controller;
#gpio-cells = <2>;
gpio-line-names = "GPIO_eMMC_RSTn", "CAN_MUX_SEL",
diff --git a/arch/arm64/boot/dts/ti/k3-am642-sk.dts b/arch/arm64/boot/dts/ti/k3-am642-sk.dts
index d28a38c87f32a..aa87845d77598 100644
--- a/arch/arm64/boot/dts/ti/k3-am642-sk.dts
+++ b/arch/arm64/boot/dts/ti/k3-am642-sk.dts
@@ -7,6 +7,7 @@
#include <dt-bindings/phy/phy.h>
#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/net/ti-dp83867.h>
#include <dt-bindings/leds/common.h>
#include "k3-am642.dtsi"
@@ -198,7 +199,6 @@ &main_pmx0 {
main_mmc1_pins_default: main-mmc1-default-pins {
bootph-all;
pinctrl-single,pins = <
- AM64X_IOPAD(0x029c, PIN_INPUT_PULLUP, 0) /* (C20) MMC1_SDWP */
AM64X_IOPAD(0x0298, PIN_INPUT_PULLUP, 0) /* (D19) MMC1_SDCD */
AM64X_IOPAD(0x0294, PIN_INPUT_PULLUP, 0) /* (J19) MMC1_CMD */
AM64X_IOPAD(0x0290, PIN_INPUT, 0) /* (#N/A) MMC1_CLKLB */
@@ -210,6 +210,13 @@ AM64X_IOPAD(0x027c, PIN_INPUT_PULLUP, 0) /* (K18) MMC1_DAT3 */
>;
};
+ main_gpio1_ioexp_intr_pins_default: main-gpio1-ioexp-intr-default-pins {
+ pinctrl-single,pins = <
+ AM64X_IOPAD(0x029c, PIN_INPUT, 7) /* (C20) MMC1_SDWP.GPIO1_78 */
+ >;
+ bootph-all;
+ };
+
main_uart0_pins_default: main-uart0-default-pins {
bootph-all;
pinctrl-single,pins = <
@@ -383,6 +390,12 @@ exp1: gpio@70 {
bootph-all;
compatible = "nxp,pca9538";
reg = <0x70>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&main_gpio1_ioexp_intr_pins_default>;
+ interrupt-parent = <&main_gpio1>;
+ interrupts = <78 IRQ_TYPE_EDGE_FALLING>;
+ interrupt-controller;
+ #interrupt-cells = <2>;
gpio-controller;
#gpio-cells = <2>;
gpio-line-names = "GPIO_CPSW2_RST", "GPIO_CPSW1_RST",
--
2.54.0
next prev parent reply other threads:[~2026-08-05 0:48 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-05 0:48 [PATCH v2 0/4] MMC pinmux configuration fixes Judith Mendez
2026-08-05 0:48 ` Judith Mendez [this message]
2026-08-05 0:48 ` [PATCH v2 2/4] arm64: dts: ti: k3-am62a: Fix MMC0_CLK register address Judith Mendez
2026-08-05 0:48 ` [PATCH v2 3/4] arm64: dts: ti: k3-am62a: Set MMC clock pins as OUTPUT Judith Mendez
2026-08-05 10:56 ` Moteen Shah
2026-08-05 14:21 ` Mendez, Judith
2026-08-05 0:48 ` [PATCH v2 4/4] arm64: dts: ti: k3-am62: " Judith Mendez
2026-08-05 14:22 ` [PATCH v2 0/4] MMC pinmux configuration fixes Mendez, Judith
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