From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id AB608C55ABF for ; Thu, 6 Aug 2026 10:04:06 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=R+kHrAsh4mnRSRJem4byDKdYAMKiGZXK6sT/FXhxkzw=; b=t6Temvh1FKR1gFsUJwHRUxutDp foCO5VAjjEZAEQWi5YWwDCZuicXZPvAsm3F0IIXcXtMgnxr9KuLYubEneQwfPYeyEqoutEEDGjfNu 4r4X85TIDgCtElGOLO/mP5T1B/qkO64Kt1G7RNbQ472K9ipr0ei2GLhhIobF9eEoYJ8QW25P3p3cx VXoMhEkgKwkBwjJ0kj49Ebhp8bwBs0IpfKNhyAgRhLHQf32WBTUKijf/aaHKf7hkQwwhDuOoVQs6d +9+iqQ02v7NKfqaOIeGb1Cuz0Z4LsV/ot1mOdnEPoLoeWeWJbafY99A62+llWSVWYTFXG4F4JjzmD 9ps3ipDg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.99.1 #2 (Red Hat Linux)) id 1wruxE-00000005UcL-0r2u; Thu, 06 Aug 2026 10:04:00 +0000 Received: from out-180.mta1.migadu.com ([95.215.58.180]) by bombadil.infradead.org with esmtps (Exim 4.99.1 #2 (Red Hat Linux)) id 1wruxB-00000005UZx-2EpA for linux-arm-kernel@lists.infradead.org; Thu, 06 Aug 2026 10:03:58 +0000 X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1786010634; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=R+kHrAsh4mnRSRJem4byDKdYAMKiGZXK6sT/FXhxkzw=; b=ZMt2h/+pfp8Ur+idXzkBA7DuC1qVvESpBvu2ETQx/8i935rt0B1ES0lMsMOEdMSjqPmIg4 8+TVn642unYxUgWy7Orzom0bMdP9XZFf9/jLQ3rJPIlT9YoeV/SAuqvVR2HL5XrXxRpzom cCWg3woZz+t7plSts5W9g7e8snzUP7A= From: Fuad Tabba To: Marc Zyngier , Oliver Upton , linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, linux-kernel@vger.kernel.org Cc: Will Deacon , Catalin Marinas , Joey Gouly , Suzuki K Poulose , Zenghui Yu , Sascha Bischoff Subject: [PATCH v1 3/4] KVM: arm64: vgic: Do not access the GICv5 CPU interface from EL1 Date: Thu, 6 Aug 2026 11:02:55 +0100 Message-Id: <20260806100256.371164-4-fuad.tabba@linux.dev> In-Reply-To: <20260806100256.371164-1-fuad.tabba@linux.dev> References: <20260806100256.371164-1-fuad.tabba@linux.dev> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Migadu-Flow: FLOW_OUT X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260806_030357_715708_FA113764 X-CRM114-Status: GOOD ( 12.52 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org can_access_vgic_from_kernel() excludes only the GICv3 system register interface, so on a native GICv5 system without FEAT_GCIE_LEGACY it returns true under nVHE. The kernel then saves and restores the CPU interface from EL1, where ICH_VMCR_EL2 and the ICH_PPI_* registers are UNDEFINED, and the nVHE world switch already does that work at EL2. Require VHE for GICv5 as for GICv3. Fixes: 9b8e3d4ca0e73 ("KVM: arm64: gic-v5: Implement GICv5 load/put and save/restore") Signed-off-by: Fuad Tabba --- arch/arm64/kvm/vgic/vgic.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/arch/arm64/kvm/vgic/vgic.c b/arch/arm64/kvm/vgic/vgic.c index 74bace10a22ed..df58c0042ed63 100644 --- a/arch/arm64/kvm/vgic/vgic.c +++ b/arch/arm64/kvm/vgic/vgic.c @@ -1042,11 +1042,15 @@ static void vgic_flush_lr_state(struct kvm_vcpu *vcpu) static inline bool can_access_vgic_from_kernel(void) { /* - * GICv2 can always be accessed from the kernel because it is - * memory-mapped, and VHE systems can access GICv3 EL2 system - * registers. + * GICv3 and GICv5 drive the CPU interface through EL2 system + * registers, so only VHE reaches them from the kernel. GICv2 is + * memory-mapped and always reachable. */ - return !static_branch_unlikely(&kvm_vgic_global_state.gicv3_cpuif) || has_vhe(); + if (kvm_vgic_global_state.type == VGIC_V5 || + static_branch_unlikely(&kvm_vgic_global_state.gicv3_cpuif)) + return has_vhe(); + + return true; } static inline void vgic_save_state(struct kvm_vcpu *vcpu) -- 2.39.5