Re: [PATCH v3] iommu/tegra241-cmdqv: Reject a VCMDQ base above the 48-bit hardware limit

[Jason Gunthorpe <jgg@nvidia.com>]

On Thu, Aug 06, 2026 at 02:17:31PM +0100, Robin Murphy wrote:

> But if we really do want to bother sanity-checking emulations, then why
> allow them to still get away with being broken in the case that we do happen
> to allocate queue memory at a sufficiently low PA anyway? Why not actually
> validate smmu->oas itself (plus anything else relevant) in
> __tegra241_cmdqv_probe()?

Yeah, if the VMM has setup the SMMU so it cannot access all of DRAM
then it is going to be really broken across the entire driver. This
just doesn't work at all. No reason to add any special cases to look
for it only in vcmdq.

IMHO the error here is masking the base:

 	q->q_base = q->base_dma & VCMDQ_ADDR;

That's sort of a HW bug to design like that, the base should be a full
64 bit value and programming any base that falls outside the S2 should
always generate the same HW fault forwarded toward the VM. The HW
should have captured the unsupported upper bits and compressed them
into a 'fail all DMA' flag.

Jason