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From: Jiaxing Hu <gahing@gahingwoo.com>
To: robin.murphy@arm.com, diederik@cknow-tech.com,
	tomeu@tomeuvizoso.net, heiko@sntech.de
Cc: royalnet026@gmail.com, alchark@flipper.net,
	chaoyi.chen@rock-chips.com, linux-rockchip@lists.infradead.org,
	dri-devel@lists.freedesktop.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org
Subject: Re: [RFC PATCH v6 7/9] accel/rocket: add RK3576 NPU (RKNN) support
Date: Sat,  8 Aug 2026 09:16:28 +1200	[thread overview]
Message-ID: <20260807211629.1573228-1-gahing@gahingwoo.com> (raw)
In-Reply-To: <fb94bd28-fdbf-4f99-a6ff-b5ab18c64345@arm.com>

On 07/08/2026 1:56 pm, Robin Murphy wrote:
> If the interrupt never fires at all then possibly the signal depends on
> some additional clock or power domain in order to propagate, or it's
> just described incorrectly; or if other interrupt sources within the
> NPU/IOMMU do still work then maybe there's some additional masking
> control that's been overlooked, or perhaps it it just terminally broken.

Robin, Diederik, I owe you both a correction before you spend any more
time on this. The premise is wrong. The interrupt is fine, and the
polling in patch 7 should not exist.

The completion interrupt does reach the GIC on RK3576. With the fix
below and the hrtimer disabled, so that only a real interrupt can retire
a job, a single int8 convolution runs correctly three times out of three
on three different inputs with zero timeouts and /proc/interrupts
counting up. No extra clock, no extra power domain, no extra mask.

What was actually wrong is one register write. PC_TASK_CON packs the
task number, and rocket_registers.h is derived from RK3588, where that
field is 12 bits wide with TASK_PP_EN, TASK_COUNT_CLEAR and RESERVED_0
above it at bits 12, 13 and 14. RK3576 uses a 16 bit task number, so
those three controls sit at bits 16, 17 and 18 instead:

  rocket, v1 through v6:  TASK_CON = 0x00007001
  vendor driver, RK3576:  TASK_CON = 0x00070001

So the PC read our word as task_number = 0x7001, that is 28673 tasks,
with the count clear landing on nothing. It never signalled completion
because by its own count it was never finished, and only a full reset
ever cleared the counter. That also explains the other symptom in the
cover letter, that only the first job after a reset computed anything.

  rocket_pc_writel(core, TASK_CON, (0x7u << 16) | task_count);

I found it by taking an ordered trace of every register write our driver
makes during one submit and diffing it against the same trace from the
vendor driver on the same board. Exactly one value differed. I should
have done that before writing a workaround, and before describing a
hardware limitation I had not established.

Two guesses I made the same night, a per job IOMMU teardown and the
vendor's post completion sequence, were both wrong, which is the other
half of the lesson.

So for v7: patch 7 loses the polling and the "the interrupt does not
arrive" text. I would rather not carry a bounded poll at all. Jobs that
compute incorrectly do still time out, but that is a driver bug on my
side rather than something the hardware needs help with, and the
scheduler timeout already covers it. Diederik, this is what you warned
me about off list, that a poll reads as a workaround for an
undetermined problem. You were right and the problem is now determined.

The rest of v7 follows what you both asked for: the job_lock fix becomes
its own patch with a Fixes tag and leaves the RFC series, the
rk3588_soc_data change is separated from adding rk3576_soc_data,
refactoring comes before the new support rather than inside it, and I
will stop editing a comment in the patch after the one that added it.

On the GIC question, for the record, so the thread has it in one place:
RK3576 is GICv2, gic-400 in the upstream DT, not GICv3. It made no
difference here, as you said it would not.

Thanks for digging into this, and sorry for pointing you at a fault that
was mine.

Jiaxing


  parent reply	other threads:[~2026-08-07 21:17 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-08-06  6:34 [RFC PATCH v6 0/9] accel/rocket: RK3576 NPU (RKNN) enablement Jiaxing Hu
2026-08-06  6:34 ` [RFC PATCH v6 1/9] dt-bindings: npu: rockchip: add rockchip,rk3576-rknn-core Jiaxing Hu
2026-08-06  6:34 ` [RFC PATCH v6 2/9] dt-bindings: power: rockchip: allow resets in a power domain node Jiaxing Hu
2026-08-06  6:34 ` [RFC PATCH v6 3/9] dt-bindings: iommu: rockchip: allow the RK3576 NPU MMU clock set Jiaxing Hu
2026-08-06  9:23   ` Diederik de Haas
2026-08-06  9:55     ` Jiaxing Hu
2026-08-06 11:29       ` Diederik de Haas
2026-08-06  6:34 ` [RFC PATCH v6 4/9] pmdomain/rockchip: add optional per-domain power-on settle delay Jiaxing Hu
2026-08-06  6:34 ` [RFC PATCH v6 5/9] pmdomain/rockchip: cycle optional power-domain resets on power-on Jiaxing Hu
2026-08-06  6:34 ` [RFC PATCH v6 6/9] accel/rocket: select the per-core clock and reset counts from match data Jiaxing Hu
2026-08-07  8:10   ` Diederik de Haas
2026-08-06  6:34 ` [RFC PATCH v6 7/9] accel/rocket: add RK3576 NPU (RKNN) support Jiaxing Hu
2026-08-07  8:48   ` Diederik de Haas
2026-08-07 12:55     ` Robin Murphy
2026-08-07 13:32       ` Diederik de Haas
2026-08-07 14:24         ` Robin Murphy
2026-08-07 21:16       ` Jiaxing Hu [this message]
2026-08-06  6:34 ` [RFC PATCH v6 8/9] arm64: dts: rockchip: rk3576: add NPU (RKNN) nodes Jiaxing Hu
2026-08-06  6:34 ` [RFC PATCH v6 9/9] arm64: dts: rockchip: rk3576-rock-4d: enable NPU Jiaxing Hu

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