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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Maxime Coquelin , Alexandre Torgue Cc: netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, Lorenzo Bianconi X-Mailer: b4 0.14.3 X-Proofpoint-GUID: kt8oUN1fq6dqKu9KjSg_uX853APK3imY X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwODA4MDE0OSBTYWx0ZWRfX+UQ2s7xIPG0W lreZUUTiS71KlHwEhCOuAzN7WeTG2Z8zlMqGfyGamFLyy115bB2JmAgJGVBoqTtGMHiwoFXC6oH IEeMwNBwguCtsC1v81i4pnxu2aE5eY9CJXwh+MYGjZbe0PsSwUSX8KP4UAovR+X3t61nOsteg1Z yzoe0CyM75mb8wLKAV3BS0pIC6CnFReSvy6yLsJ/sPaGkikqIJ8/yXjYTmp24cJN4km61C70jQF b8IEEEjB4O9wY/V3JKpjS5qH3KJMukB7y4ynSjrKWamgeQunX+hnmq9TpcDptHi6QbiCCYDolqg vwqNWDXVoQgahKoJ5U5MwKLHS0HX42N5lMZ0+M4uXdCJHKdwR1AS5YKZIHbAgNSftt3vUdgv6b7 73qiGmEmVWCZBohBTku7OIGruupHhf5YrWQTLTr2rNuDDVsA8J3zP1M/jbHHQC4jIChpCn9h2cE zsiwYTpSaijVsXJPMIw== X-Authority-Analysis: v=2.4 cv=PbrPQChd c=1 sm=1 tr=0 ts=6a7765ce cx=c_pps a=EVbN6Ke/fEF3bsl7X48z0g==:117 a=WpTaRW6qxYHRGzLzQsVYzg==:17 a=IkcTkHD0fZMA:10 a=Sv0fKeRqtYgA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=3WHJM1ZQz_JShphwDgj5:22 a=VwQbUJbxAAAA:8 a=EUspDBNiAAAA:8 a=OvAj1FvD3cEXO-Eea-MA:9 a=QEXdDO2ut3YA:10 a=a_PwQJl-kcHnX1M80qC6:22 X-Proofpoint-Spam-Info: AW1haW4tMjYwODA4MDE0OSBTYWx0ZWRfX+wDpsk2eJWsB U6lhm/fsEbnkCk+ng04/2OOT+1vDBmj8K7+PsYIWiUE7I1KExAkNtfrnTzUW3ytFyliJiD3/7/q IX+SJSssH8vIkAPUBDqKeJn+ZI0iB4M= X-Proofpoint-ORIG-GUID: kt8oUN1fq6dqKu9KjSg_uX853APK3imY X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-08-08_06,2026-08-07_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 clxscore=1015 bulkscore=0 impostorscore=0 phishscore=0 lowpriorityscore=0 spamscore=0 adultscore=0 malwarescore=0 suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2608080149 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260808_102223_926211_CDC10BAC X-CRM114-Status: GOOD ( 18.07 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org GSO (TSO/USO) frames are currently always sent through queue 0 since the driver assumed there was no way to determine which queues are TSO capable. This unconditionally pins all GSO traffic to queue 0, bypassing the per-flow queue distribution and any XPS setup. Instead, pick the queue through netdev_pick_tx() and fall back to queue 0 only when the selected queue cannot provide hardware checksumming (COE disabled) or, for the GSO types offloaded by hardware, cannot run TSO (TBS enabled), since TSO and TBS cannot coexist on the same channel (see stmmac_tso_channel_permitted()). While at it, base the TSO capability check on priv->gso_enabled_types rather than a hardcoded GSO type mask, so it matches the TSO/USO capability actually used by the transmit path (e.g. UDP segmentation is only offloaded on GMAC4). Signed-off-by: Lorenzo Bianconi --- Changes in v2: - Take into account when checksum offload is not supported. - Link to v1: https://lore.kernel.org/r/20260807-stmmac_select_queue-tso-fix-v1-1-4c4787bad02b@oss.qualcomm.com --- drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 18 ++++++++++-------- 1 file changed, 10 insertions(+), 8 deletions(-) diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c index b2b7d0242dd3..7a4bd0292966 100644 --- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c +++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c @@ -6445,19 +6445,21 @@ static int stmmac_setup_tc(struct net_device *ndev, enum tc_setup_type type, static u16 stmmac_select_queue(struct net_device *dev, struct sk_buff *skb, struct net_device *sb_dev) { - int gso = skb_shinfo(skb)->gso_type; + u32 queue = netdev_pick_tx(dev, skb, NULL) % dev->real_num_tx_queues; + struct stmmac_priv *priv = netdev_priv(dev); - if (gso & (SKB_GSO_TCPV4 | SKB_GSO_TCPV6 | SKB_GSO_UDP_L4)) { - /* - * There is no way to determine the number of TSO/USO - * capable Queues. Let's use always the Queue 0 - * because if TSO/USO is supported then at least this - * one will be capable. + if (skb_is_gso(skb) && + (priv->plat->tx_queues_cfg[queue].coe_unsupported || + ((skb_shinfo(skb)->gso_type & priv->gso_enabled_types) && + !stmmac_tso_channel_permitted(priv, queue)))) { + /* GSO frames need hardware checksumming. Moreover, hardware + * TSO/USO can't run on COE-less or TBS queues. In this case + * fall back to the queue reserved for TSO (queue 0). */ return 0; } - return netdev_pick_tx(dev, skb, NULL) % dev->real_num_tx_queues; + return queue; } static int stmmac_set_mac_address(struct net_device *ndev, void *addr) --- base-commit: 8ac4255c1e0c83d2e1559a18b8918673116fc8d6 change-id: 20260807-stmmac_select_queue-tso-fix-06cc586d4022 Best regards, -- Lorenzo Bianconi