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Miller" , Rob Herring , Krzysztof Kozlowski , Heiko Stuebner , Diederik de Haas , Eric Biggers , Sebastian Reichel , Philipp Zabel , Conor Dooley , Corentin Labbe , linux-crypto@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v3 1/4] dt-bindings: crypto: rockchip: Add RK356x/RK3588 crypto engine binding Message-ID: <20260818-gracious-sincere-limpet-affeee@quoll> References: <20260708175837.1718437-1-dawidro@gmail.com> <20260816194112.552100-1-dawidro@gmail.com> <20260816194112.552100-2-dawidro@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <20260816194112.552100-2-dawidro@gmail.com> X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Sun, Aug 16, 2026 at 08:39:44PM +0100, Dawid Olesinski wrote: > Add a YAML device tree binding for the Rockchip second-generation (V2) > cryptographic hardware accelerator present on the RK3568 and RK3588 SoCs. > > The IP block exposes AES-ECB, AES-CBC, AES-XTS block ciphers, SHA-1, > SHA-224, SHA-256, SHA-384, SHA-512, MD5, and SM3 hash algorithms, each > with a hardware DMA engine controlled via linked-list descriptors. > > The binding covers two compatible strings: > > - rockchip,rk3568-crypto: clocks and resets are driven directly by the > non-secure CRU (accessible to Linux at EL1). > - rockchip,rk3588-crypto: clocks and resets live in SECURECRU, a > register bank sandboxed to TrustZone. Linux must request them through > the ARM SCMI firmware interface (scmi_clk / scmi_reset), as direct > MMIO access to SECURECRU from EL1 triggers a bus fault. > > Co-developed-by: Corentin Labbe > Signed-off-by: Corentin Labbe > Signed-off-by: Dawid Olesinski > Tested-by: Diederik de Haas # Quartz64-B, Nope. Not possible. Drop non-applicable tags. > NanoPi R5S, NanoPC-T6 LTS > --- > .../crypto/rockchip,rk3588-crypto.yaml | 83 +++++++++++++++++++ > MAINTAINERS | 2 + > 2 files changed, 85 insertions(+) > create mode 100644 Documentation/devicetree/bindings/crypto/rockchip,rk3588-crypto.yaml > > diff --git a/Documentation/devicetree/bindings/crypto/rockchip,rk3588-crypto.yaml b/Documentation/devicetree/bindings/crypto/rockchip,rk3588-crypto.yaml > new file mode 100644 > index 000000000000..32d241c19453 > --- /dev/null > +++ b/Documentation/devicetree/bindings/crypto/rockchip,rk3588-crypto.yaml Fallback should be used as the filename. ... > + clocks: > + items: > + - description: Core clock for the crypto IP internal logic > + - description: AXI interconnect clock interface > + - description: AHB interface clock > + > + clock-names: > + items: > + - const: core > + - const: aclk > + - const: hclk > + > + resets: > + minItems: 1 > + maxItems: 3 > + > + reset-names: > + minItems: 1 Why is this flexible? > + items: > + - const: core > + - const: aclk > + - const: hclk > + > +required: > + - compatible > + - reg > + - interrupts > + - clocks > + - clock-names > + - resets > + - reset-names Binding looks the same as Documentation/devicetree/bindings/crypto/rockchip,rk3288-crypto.yaml. Why it cannot be added there? Aren't the clocks and resets basically the same as in that file? Best regards, Krzysztof