From: Luca Leonardo Scorcia <l.scorcia@gmail.com>
To: linux-mediatek@lists.infradead.org
Cc: Luca Leonardo Scorcia <l.scorcia@gmail.com>,
Wim Van Sebroeck <wim@linux-watchdog.org>,
Guenter Roeck <linux@roeck-us.net>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Matthias Brugger <matthias.bgg@gmail.com>,
AngeloGioacchino Del Regno
<angelogioacchino.delregno@collabora.com>,
Philipp Zabel <p.zabel@pengutronix.de>,
linux-watchdog@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH v4 5/7] watchdog: mediatek: Add support for mt8167 toprgu/watchdog
Date: Wed, 19 Aug 2026 12:16:26 +0200 [thread overview]
Message-ID: <20260819101853.44681-6-l.scorcia@gmail.com> (raw)
In-Reply-To: <20260819101853.44681-1-l.scorcia@gmail.com>
Add support for the Top Reset Generation Unit/Watchdog Timer found on
mt8167.
Since according to its data sheet mt8167 toprgu reset bits are not
contiguous, add support for a reset table to the driver. This lets us
define reset identifiers as contiguous indexes in the binding headers.
Also address a preexisting Sashiko finding that noticed that the
has_swsysrst_en configuration was set after the reset controller
registration.
Signed-off-by: Luca Leonardo Scorcia <l.scorcia@gmail.com>
---
drivers/watchdog/mtk_wdt.c | 47 ++++++++++++++++++++++++++++++++++----
1 file changed, 43 insertions(+), 4 deletions(-)
diff --git a/drivers/watchdog/mtk_wdt.c b/drivers/watchdog/mtk_wdt.c
index f8208fb0f723..fa522fd80dd4 100644
--- a/drivers/watchdog/mtk_wdt.c
+++ b/drivers/watchdog/mtk_wdt.c
@@ -13,6 +13,7 @@
#include <dt-bindings/reset/mediatek,mt6589-wdt.h>
#include <dt-bindings/reset/mediatek,mt6735-wdt.h>
#include <dt-bindings/reset/mediatek,mt6795-resets.h>
+#include <dt-bindings/reset/mediatek,mt8167-wdt.h>
#include <dt-bindings/reset/mt7986-resets.h>
#include <dt-bindings/reset/mt8183-resets.h>
#include <dt-bindings/reset/mt8186-resets.h>
@@ -78,11 +79,14 @@ struct mtk_wdt_dev {
bool disable_wdt_extrst;
bool reset_by_toprgu;
bool has_swsysrst_en;
+ const u8 *toprgu_sw_rst_tb;
+ int toprgu_sw_rst_num;
};
struct mtk_wdt_data {
- int toprgu_sw_rst_num;
- bool has_swsysrst_en;
+ const u8 *toprgu_sw_rst_tb;
+ const int toprgu_sw_rst_num;
+ const bool has_swsysrst_en;
};
static const struct mtk_wdt_data mt2712_data = {
@@ -130,6 +134,29 @@ static const struct mtk_wdt_data mt8195_data = {
.toprgu_sw_rst_num = MT8195_TOPRGU_SW_RST_NUM,
};
+static const u8 mt8167_toprgu_sw_rst_tb[] = {
+ [MT8167_TOPRGU_DDRPHY_FLASH_RST] = 0,
+ [MT8167_TOPRGU_AUD_PAD_RST] = 1,
+ [MT8167_TOPRGU_MM_RST] = 2,
+ [MT8167_TOPRGU_MFG_RST] = 3,
+ [MT8167_TOPRGU_MDSYS_RST] = 4,
+ [MT8167_TOPRGU_CONN_RST] = 5,
+ [MT8167_TOPRGU_PAD2CAM_DIG_MIPI_RX_RST] = 6,
+ [MT8167_TOPRGU_DIG_MIPI_TX_RST] = 7,
+ [MT8167_TOPRGU_SPI_PAD_MACRO_RST] = 8,
+ /* The data sheet describes bit 9 as "reserved, unused" */
+ [MT8167_TOPRGU_APMIXED_RST] = 10,
+ [MT8167_TOPRGU_VDEC_RST] = 11,
+ [MT8167_TOPRGU_CONN_MCU_RST] = 12,
+ [MT8167_TOPRGU_EFUSE_RST] = 13,
+ [MT8167_TOPRGU_PWRAP_SPICTL_RST] = 14
+};
+
+static const struct mtk_wdt_data mt8167_data = {
+ .toprgu_sw_rst_tb = mt8167_toprgu_sw_rst_tb,
+ .toprgu_sw_rst_num = ARRAY_SIZE(mt8167_toprgu_sw_rst_tb),
+};
+
/**
* toprgu_reset_sw_en_unlocked() - enable/disable software control for reset bit
* @data: Pointer to instance of driver data.
@@ -160,6 +187,15 @@ static int toprgu_reset_update(struct reset_controller_dev *rcdev,
struct mtk_wdt_dev *data =
container_of(rcdev, struct mtk_wdt_dev, rcdev);
+ if (data->toprgu_sw_rst_tb) {
+ if (id >= data->toprgu_sw_rst_num) {
+ dev_err(rcdev->dev, "Invalid reset ID: %lu (>=%u)\n",
+ id, data->toprgu_sw_rst_num);
+ return -EINVAL;
+ }
+ id = data->toprgu_sw_rst_tb[id];
+ }
+
spin_lock_irqsave(&data->lock, flags);
if (assert && data->has_swsysrst_en)
@@ -457,12 +493,14 @@ static int mtk_wdt_probe(struct platform_device *pdev)
wdt_data = of_device_get_match_data(dev);
if (wdt_data) {
+ mtk_wdt->toprgu_sw_rst_num = wdt_data->toprgu_sw_rst_num;
+ mtk_wdt->toprgu_sw_rst_tb = wdt_data->toprgu_sw_rst_tb;
+ mtk_wdt->has_swsysrst_en = wdt_data->has_swsysrst_en;
+
err = toprgu_register_reset_controller(pdev,
wdt_data->toprgu_sw_rst_num);
if (err)
return err;
-
- mtk_wdt->has_swsysrst_en = wdt_data->has_swsysrst_en;
}
mtk_wdt->disable_wdt_extrst =
@@ -503,6 +541,7 @@ static const struct of_device_id mtk_wdt_dt_ids[] = {
{ .compatible = "mediatek,mt6795-wdt", .data = &mt6795_data },
{ .compatible = "mediatek,mt7986-wdt", .data = &mt7986_data },
{ .compatible = "mediatek,mt7988-wdt", .data = &mt7988_data },
+ { .compatible = "mediatek,mt8167-wdt", .data = &mt8167_data },
{ .compatible = "mediatek,mt8183-wdt", .data = &mt8183_data },
{ .compatible = "mediatek,mt8186-wdt", .data = &mt8186_data },
{ .compatible = "mediatek,mt8188-wdt", .data = &mt8188_data },
--
2.43.0
next prev parent reply other threads:[~2026-08-19 10:20 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-19 10:16 [PATCH v4 0/7] Properly describe mt6589 and mt8167 toprgu resets Luca Leonardo Scorcia
2026-08-19 10:16 ` [PATCH v4 1/7] dt-bindings: reset: Add mt6589 toprgu reset IDs Luca Leonardo Scorcia
2026-08-19 10:16 ` [PATCH v4 2/7] watchdog: mediatek: Add wdt/toprgu resets for mt6589 Luca Leonardo Scorcia
2026-08-19 10:16 ` [PATCH v4 3/7] arm: dts: mediatek: mt6589: Enable toprgu reset controller Luca Leonardo Scorcia
2026-08-19 10:16 ` [PATCH v4 4/7] dt-bindings: watchdog: Add compatible for MediaTek mt8167 Luca Leonardo Scorcia
2026-08-19 10:16 ` Luca Leonardo Scorcia [this message]
2026-08-19 10:16 ` [PATCH v4 6/7] soc: mediatek: mtk-mmsys: Add resets for mt8167 Luca Leonardo Scorcia
2026-08-19 10:16 ` [PATCH v4 7/7] arm64: dts: mt8167: Properly describe the SoC watchdog and mmsys resets Luca Leonardo Scorcia
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