From: phucduc.bui@gmail.com
To: Mark Brown <broonie@kernel.org>,
Matthias Brugger <matthias.bgg@gmail.com>
Cc: Liam Girdwood <lgirdwood@gmail.com>,
AngeloGioacchino Del Regno
<angelogioacchino.delregno@collabora.com>,
Jaroslav Kysela <perex@perex.cz>, Takashi Iwai <tiwai@suse.com>,
Cezary Rojewski <cezary.rojewski@intel.com>,
linux-sound@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-mediatek@lists.infradead.org, linux-kernel@vger.kernel.org,
bui duc phuc <phucduc.bui@gmail.com>
Subject: [PATCH 4/5] ASoC: mediatek: mt8186: Fix MCK error handling
Date: Thu, 20 Aug 2026 18:12:52 +0700 [thread overview]
Message-ID: <20260820111253.97866-5-phucduc.bui@gmail.com> (raw)
In-Reply-To: <20260820111253.97866-1-phucduc.bui@gmail.com>
From: bui duc phuc <phucduc.bui@gmail.com>
The mt8186_mck_enable() function returns immediately when a clock
operation fails, leaving previously enabled clocks active.
Add error paths to disable previously enabled clocks before returning
the error.
Signed-off-by: bui duc phuc <phucduc.bui@gmail.com>
---
sound/soc/mediatek/mt8186/mt8186-afe-clk.c | 17 +++++++++++++----
1 file changed, 13 insertions(+), 4 deletions(-)
diff --git a/sound/soc/mediatek/mt8186/mt8186-afe-clk.c b/sound/soc/mediatek/mt8186/mt8186-afe-clk.c
index d6b0174e2655..8cc8eb8022b5 100644
--- a/sound/soc/mediatek/mt8186/mt8186-afe-clk.c
+++ b/sound/soc/mediatek/mt8186/mt8186-afe-clk.c
@@ -528,7 +528,7 @@ int mt8186_mck_enable(struct mtk_base_afe *afe, int mck_id, int rate)
if (ret) {
dev_err(afe->dev, "%s(), clk_prepare_enable %s fail %d\n",
__func__, aud_clks[m_sel_id], ret);
- return ret;
+ goto ERR_ENABLE_MCLK;
}
ret = clk_set_parent(afe_priv->clk[m_sel_id],
afe_priv->clk[apll_clk_id]);
@@ -536,7 +536,7 @@ int mt8186_mck_enable(struct mtk_base_afe *afe, int mck_id, int rate)
dev_err(afe->dev, "%s(), clk_set_parent %s-%s fail %d\n",
__func__, aud_clks[m_sel_id],
aud_clks[apll_clk_id], ret);
- return ret;
+ goto ERR_SELECT_MCLK;
}
}
@@ -545,16 +545,25 @@ int mt8186_mck_enable(struct mtk_base_afe *afe, int mck_id, int rate)
if (ret) {
dev_err(afe->dev, "%s(), clk_prepare_enable %s fail %d\n",
__func__, aud_clks[div_clk_id], ret);
- return ret;
+ goto ERR_ENABLE_MCLK_DIV;
}
ret = clk_set_rate(afe_priv->clk[div_clk_id], rate);
if (ret) {
dev_err(afe->dev, "%s(), clk_set_rate %s, rate %d, fail %d\n",
__func__, aud_clks[div_clk_id], rate, ret);
- return ret;
+ goto ERR_SET_MCLK_RATE;
}
return 0;
+
+ERR_SET_MCLK_RATE:
+ clk_disable_unprepare(afe_priv->clk[div_clk_id]);
+ERR_ENABLE_MCLK_DIV:
+ERR_SELECT_MCLK:
+ if (m_sel_id >= 0)
+ clk_disable_unprepare(afe_priv->clk[m_sel_id]);
+ERR_ENABLE_MCLK:
+ return ret;
}
void mt8186_mck_disable(struct mtk_base_afe *afe, int mck_id)
--
2.43.0
next prev parent reply other threads:[~2026-08-20 11:14 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-20 11:12 [PATCH 0/5] ASoC: mediatek: mt8186: Fix clock error handling phucduc.bui
2026-08-20 11:12 ` [PATCH 1/5] ASoC: mediatek: mt8186: fix APLL mux setting " phucduc.bui
2026-08-20 11:12 ` [PATCH 2/5] ASoC: mediatek: mt8186: Fix AFE clock " phucduc.bui
2026-08-20 11:12 ` [PATCH 3/5] ASoC: mediatek: mt8186: Fix APLL enable " phucduc.bui
2026-08-20 11:12 ` phucduc.bui [this message]
2026-08-20 11:12 ` [PATCH 5/5] ASoC: mediatek: mt8186: Propagate clock lookup errors phucduc.bui
2026-08-20 11:36 ` [PATCH 0/5] ASoC: mediatek: mt8186: Fix clock error handling Bui Duc Phuc
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