From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 512D3C5DF9C for ; Sat, 22 Aug 2026 07:49:21 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=2L5O99jQ5jMH3/ZfNLN4ePAqoJtT/Ha0IVk0UXWwOWs=; b=f0YbNOhZWRawjZo+SkZ8yBSNfT ud0KWLDnjmzmRi5QGngvckXGIebMe0vQ0aRda0NQgyHSoiGfFy2nDoiic+3wQWBLsSzL9DMQPXFwW BAC0eki/RuzVTuHzGD8ZOtc7ywVZWx6ymuY6VZ29i+KqRYEcfHyJrXhN2I9DkoPakVDzaWeFMyEmj g/V1mxf+yHHRpMyAf3y8/KQb111A1ot3c7dfgpkLVxHIomhwmKWikAc/ZOK4jdnpZjwH+nqHdkbAk qHvxS4HlrOrdCYxDkrWsHm83Jjz1n2hihDSGC4Y5n21Ghp+ecYR2+no+yKT3czhWv9RGmEIavTlPV oSnsoz0Q==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.99.1 #2 (Red Hat Linux)) id 1wxgTV-0000000ELwe-2MNT; Sat, 22 Aug 2026 07:49:09 +0000 Received: from mx.nabladev.com ([178.251.229.89]) by bombadil.infradead.org with esmtps (Exim 4.99.1 #2 (Red Hat Linux)) id 1wxgTP-0000000ELq6-2Xw2; Sat, 22 Aug 2026 07:49:05 +0000 Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id A336111C814; Sat, 22 Aug 2026 09:48:56 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nabladev.com; s=dkim; t=1787384937; h=from:subject:date:message-id:to:cc:mime-version: content-transfer-encoding:in-reply-to:references; bh=2L5O99jQ5jMH3/ZfNLN4ePAqoJtT/Ha0IVk0UXWwOWs=; b=Uy9wex9zeflIc5sXrnf6UpDhjwFjGqxghrNV+rL8o9+jBbZnUe6/EpCCU5z1lHUmgybsd+ FJ3ds0cpwFDAgB+cW6gGsQU9s4YyKlaODnkiPkruoRv03n9OMnlvnfBHUGDRFUAfGQDuro bwhgXXWixa+rfw47QQUUjaNaVZrdQhZ8CWFE0OvyJpOl6a3l2MCKpMQtIGJlOlId56EGxz bwy+zPwa/GDPgRufWnuWJpqNe//2WZwQGpF91O+kTPKmnXSO91mXTiaWWTzugi77stCJTP rJJd0Im4lOh8XY5NxaONAHlZJynAKWv1f2DhRua9kGB/vOij5voujgLiHUD97Q== From: Marek Vasut To: linux-usb@vger.kernel.org Cc: fabrice.gasnier@foss.st.com, Marek Vasut , Alexandre Torgue , Christian Bruel , Conor Dooley , Greg Kroah-Hartman , Krzysztof Kozlowski , Maxime Coquelin , Neil Armstrong , Pankaj Dev , Rahul Kumar , Rob Herring , Rosen Penev , Thinh Nguyen , Vinod Koul , devicetree@vger.kernel.org, kernel@dh-electronics.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-phy@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com Subject: [PATCH v3 6/9] usb: dwc3: dwc3-generic-plat: Add ST STM32MP2 DWC3 xHCI USB controller glue Date: Sat, 22 Aug 2026 09:46:39 +0200 Message-ID: <20260822074816.548662-7-marex@nabladev.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260822074816.548662-1-marex@nabladev.com> References: <20260822074816.548662-1-marex@nabladev.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Last-TLS-Session-Version: TLSv1.3 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260822_004903_946826_21395054 X-CRM114-Status: GOOD ( 12.69 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The ST STM32MP2 SoC contains one instance of DWC3 USB controller with glue logic wrapper around it controlled by syscon. Extend the generic DWC3 platform driver with ST STM32MP2 glue logic specifics. Signed-off-by: Marek Vasut --- Cc: Alexandre Torgue Cc: Christian Bruel Cc: Conor Dooley Cc: Fabrice Gasnier Cc: Greg Kroah-Hartman Cc: Krzysztof Kozlowski Cc: Maxime Coquelin Cc: Neil Armstrong Cc: Pankaj Dev Cc: Rahul Kumar Cc: Rob Herring Cc: Rosen Penev Cc: Thinh Nguyen Cc: Vinod Koul Cc: devicetree@vger.kernel.org Cc: kernel@dh-electronics.com Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Cc: linux-phy@lists.infradead.org Cc: linux-stm32@st-md-mailman.stormreply.com Cc: linux-usb@vger.kernel.org --- V2: No change V3: - Use generic over-current-active-low --- drivers/usb/dwc3/dwc3-generic-plat.c | 44 ++++++++++++++++++++++++++++ 1 file changed, 44 insertions(+) diff --git a/drivers/usb/dwc3/dwc3-generic-plat.c b/drivers/usb/dwc3/dwc3-generic-plat.c index ca69ac0eb07ce..f670576511b59 100644 --- a/drivers/usb/dwc3/dwc3-generic-plat.c +++ b/drivers/usb/dwc3/dwc3-generic-plat.c @@ -22,6 +22,12 @@ #define EIC7700_HSP_AXI_LP_XM_CSYSREQ BIT(0) #define EIC7700_HSP_AXI_LP_XS_CSYSREQ BIT(16) +#define STM32MP2_USB3DRCR_HOST_PORT_POWER_CONTROL_PRESENT BIT(0) +#define STM32MP2_USB3DRCR_OVRCUR_POLARITY BIT(1) +#define STM32MP2_USB3DRCR_VBUSEN_POLARITY BIT(2) +#define STM32MP2_USB3DRCR_USB2ONLYH BIT(3) +#define STM32MP2_USB3DRCR_USB2ONLYD BIT(4) + struct dwc3_generic { struct device *dev; struct dwc3 dwc; @@ -85,6 +91,38 @@ static int dwc3_spacemit_k1_init(struct dwc3_generic *dwc3g) return 0; } +static int dwc3_stm32mp25_init(struct dwc3_generic *dwc3g) +{ + struct device *dev = dwc3g->dev; + bool ovrcur_polarity_low = device_property_read_bool(dev, "over-current-active-low"); + bool prt_pwr_ctrl = device_property_read_bool(dev, "st,enable-port-power-control"); + bool usb2only_conf = device_property_match_string(dev, "phy-names", "usb3-phy") < 0; + bool vbusen_polarity_low = device_property_read_bool(dev, "st,vbusen-active-low"); + struct regmap *regmap; + u32 drcr; + + regmap = syscon_regmap_lookup_by_phandle_args(dev->of_node, "st,syscfg", 1, &drcr); + if (IS_ERR(regmap)) + return dev_err_probe(dev, PTR_ERR(regmap), "No st,syscfg phandle specified\n"); + + return regmap_update_bits(regmap, drcr, + STM32MP2_USB3DRCR_HOST_PORT_POWER_CONTROL_PRESENT | + STM32MP2_USB3DRCR_OVRCUR_POLARITY | + STM32MP2_USB3DRCR_VBUSEN_POLARITY | + STM32MP2_USB3DRCR_USB2ONLYD | + STM32MP2_USB3DRCR_USB2ONLYH, + FIELD_PREP(STM32MP2_USB3DRCR_HOST_PORT_POWER_CONTROL_PRESENT, + prt_pwr_ctrl) | + FIELD_PREP(STM32MP2_USB3DRCR_OVRCUR_POLARITY, + ovrcur_polarity_low) | + FIELD_PREP(STM32MP2_USB3DRCR_VBUSEN_POLARITY, + vbusen_polarity_low) | + FIELD_PREP(STM32MP2_USB3DRCR_USB2ONLYD, + !!usb2only_conf) | + FIELD_PREP(STM32MP2_USB3DRCR_USB2ONLYH, + !!usb2only_conf)); +} + static int dwc3_generic_probe(struct platform_device *pdev) { const struct dwc3_generic_config *plat_config; @@ -231,12 +269,18 @@ static const struct dwc3_generic_config eic7700_dwc3 = { .properties = DWC3_DEFAULT_PROPERTIES, }; +static const struct dwc3_generic_config stm32mp25_dwc3 = { + .init = dwc3_stm32mp25_init, + .properties = DWC3_DEFAULT_PROPERTIES, +}; + static const struct of_device_id dwc3_generic_of_match[] = { { .compatible = "spacemit,k1-dwc3", &spacemit_k1_dwc3}, { .compatible = "spacemit,k3-dwc3", }, { .compatible = "fsl,ls1028a-dwc3", &fsl_ls1028_dwc3}, { .compatible = "eswin,eic7700-dwc3", &eic7700_dwc3}, { .compatible = "starfive,jhb100-dwc3", }, + { .compatible = "st,stm32mp25-dwc3", &stm32mp25_dwc3 }, { /* sentinel */ } }; MODULE_DEVICE_TABLE(of, dwc3_generic_of_match); -- 2.53.0