From: Bradley Morgan <brads@mainlining.org>
To: Will Deacon <will@kernel.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>,
Mark Rutland <mark.rutland@arm.com>,
James Morse <james.morse@arm.com>, Marc Zyngier <maz@kernel.org>,
Ard Biesheuvel <ardb@kernel.org>,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, brads@mainlining.org
Subject: [PATCH 2/7] arm64: head: correct comment for init_kernel_el()
Date: Tue, 25 Aug 2026 20:58:34 +0000 [thread overview]
Message-ID: <20260825205839.14571-3-brads@mainlining.org> (raw)
In-Reply-To: <20260825205839.14571-1-brads@mainlining.org>
The comment above init_kernel_el() still says the function configures
the CPU to execute at the highest reachable EL, but that stopped being
true a while back. Ever since commit ae4b7e38e9a94798 ("arm64: Allow
sticky E2H when entering EL1"), init_kernel_el() always drops to EL1,
and it is finalise_el2() that brings us back up to EL2 when we want it.
Update the comment to match what the code actually does.
Signed-off-by: Bradley Morgan <brads@mainlining.org>
Cc: Ard Biesheuvel <ardb@kernel.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: James Morse <james.morse@arm.com>
Cc: Marc Zyngier <maz@kernel.org>
Cc: Will Deacon <will@kernel.org>
---
arch/arm64/kernel/head.S | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S
index 87a822e5c4ca..c6301557eee1 100644
--- a/arch/arm64/kernel/head.S
+++ b/arch/arm64/kernel/head.S
@@ -254,9 +254,9 @@ SYM_FUNC_END(__primary_switched)
.section ".idmap.text","a"
/*
- * Starting from EL2 or EL1, configure the CPU to execute at the highest
- * reachable EL supported by the kernel in a chosen default state. If dropping
- * from EL2 to EL1, configure EL2 before configuring EL1.
+ * Starting from EL2 or EL1, configure the CPU to execute at EL1.
+ * If dropping from EL2 to EL1, configure EL2 before configuring EL1.
+ * To use VHE we'll upgrade back to EL2 later in finalise_el2().
*
* Since we cannot always rely on ERET synchronizing writes to sysregs (e.g. if
* SCTLR_ELx.EOS is clear), we place an ISB prior to ERET.
--
2.47.3
next prev parent reply other threads:[~2026-08-25 20:59 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-08-25 20:58 [PATCH 0/7] arm64: hibernate: dust off the suspend/cleanup rework Bradley Morgan
2026-08-25 20:58 ` [PATCH 1/7] arm64: hibernate: pass HVC_SET_VECTORS args to the resume hvc Bradley Morgan
2026-08-25 20:58 ` Bradley Morgan [this message]
2026-08-25 20:58 ` [PATCH 3/7] arm64: hibernate: free MTE tag pages after saving Bradley Morgan
2026-08-25 20:58 ` [PATCH 4/7] arm64: hibernate: fix _cpu_resume() calling convention Bradley Morgan
2026-08-25 20:58 ` [PATCH 5/7] arm64: hibernate: use dcache_by_myline_op Bradley Morgan
2026-08-25 20:58 ` [PATCH 6/7] arm64: hibernate: only clean to PoC Bradley Morgan
2026-08-25 20:58 ` [PATCH 7/7] arm64: hibernate: use regular cpu_resume() logic Bradley Morgan
2026-08-28 10:32 ` [PATCH 0/7] arm64: hibernate: dust off the suspend/cleanup rework Ard Biesheuvel
2026-08-28 11:31 ` Bradley Morgan
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