From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7AC14C61DE1 for ; Sun, 30 Aug 2026 16:03:22 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=jvNTfLw6tGTRj6Jb6QoSk5fmPXA5ASCBLAMOlppetrE=; b=DzpYV16fuAoJ9lq7RBifcwZZUF yGMslM8WD+As8BzdTt2/JCrE+u2ymtN9pOo4F0HxnOsHWekPaHuJ/N043NrOg25rHvTiZLihpVlNw ix37BiRTJdMCYTruxOagoUrjj+t5wR0/dPZbXs3lqMPHtIvJtR8AOI62le4rMdq+MwWvI4GKukT5O QPETLBXQWnMoMEvVZsa9BhkWp9T1Vzn6xVt5MA5yH795Z9oYP899F+8tbGJK+2WBzJZDiaxISrtda rYTHV1NcI0/uozon1fbmlU2dRwu6WpJO2Nt6O8WnEgJhwCAb2iWYuAL7YnSm31lLTtk2xmmEhBRlb s4ytZbCQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.99.1 #2 (Red Hat Linux)) id 1x0i04-00000007tJw-0Lqx; Sun, 30 Aug 2026 16:03:16 +0000 Received: from mail-pg1-x52d.google.com ([2607:f8b0:4864:20::52d]) by bombadil.infradead.org with esmtps (Exim 4.99.1 #2 (Red Hat Linux)) id 1x0i02-00000007tIT-0H7W for linux-arm-kernel@lists.infradead.org; Sun, 30 Aug 2026 16:03:15 +0000 Received: by mail-pg1-x52d.google.com with SMTP id 41be03b00d2f7-cc147d86bebso2984432a12.0 for ; Sun, 30 Aug 2026 09:03:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20251104; t=1788105793; x=1788710593; darn=lists.infradead.org; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to:content-type; bh=jvNTfLw6tGTRj6Jb6QoSk5fmPXA5ASCBLAMOlppetrE=; b=kxqn0N3YAcxoGoNve5Jwja5iVLLOMLzMovM5Te/bZ9p37KhVVOJ3fuilLFlIGLgUSZ DvOfE0EuKBEne+EaqIU6i3jejanjbz2NDRJ5yP2ISePSrm58WWvw83QXvxfLUvwyU40h cyj/voCo0AFZO+Hw1LDtllD2qxwKdLv8HVizlxZ3Ew0mU514P0A7xytKyq4Q71Bg1taK oNRqvC/6korNrO+OPGcbsRZvy2BnD68Z2Y+HtZNlwnNXtFH+DUEStkv42g8Ql68VjR8b x4JmEqcyO9o8cDyCPa3luqlz1L5JP6X/N4ZBHsm6YKyREsWZz6IibrQMKcu5q2lVqb2C d+QQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1788105793; x=1788710593; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from :to:cc:subject:date:message-id:reply-to:content-type; bh=jvNTfLw6tGTRj6Jb6QoSk5fmPXA5ASCBLAMOlppetrE=; b=fDgzY1Xqv69PIDJnumul7zjIBVO+hkGwC/tNJ0s0UuDVKNGKv+rblUNdTyzlzbUK7H 7hquNQs0bnRHC+v1I1CAILB76Ui9AQMnHEUZH3czQH8NjTthzAPkDNDCDrpJkz+AZ1R/ /D2UhLTD+X1CH/vFk97mcoZt1vd5BqnUAKoSV0jVAhO5CWRFzLWxN0l6Fp0iMU+KbjtZ RswqlzEBRWzCIaUxj7PUGmUmZidjE8wPcwovGx1geuOL/Vmzl69QCVbh6IDJaibVFreQ QIMsIFSuYIBpmnv5AORrgjz7MMaeK9lW4m8pn0GO+stfSIo56ytxB9UBrKUnAv6tk8PO qgUA== X-Forwarded-Encrypted: i=1; AHgh+RqMmYoPOJlsfF5aDhM/zFXk2dvFj26AkQRGVAh6WdzIn8hPisclhrfA4U5PcY/z3PdZa3zM4svMeapmsQEcjtpG@lists.infradead.org X-Gm-Message-State: AFuF++l7ranFcItb2QUHCQIdqOoKxAALVQKdgZEcGGScZ3miooCFzmUR okzyrPAmqU3hxqHDusleduv+m5uC2jOH+6yOCWjGfNU6ZC2jz7TMxNEM X-Gm-Gg: AR+sD10A1OrIfV9zYY6rkew31NAtPX7zfm4BpwLOMna2qmMqlqJmuCVl+pSY00pOBYx yO6aksTEZUenNmXFjeMZKiU/DQ1ouOFVVisJ3D+glCLjvWyapNwv9boH8Ke3b/T5dhU4Jse5RJV KlsKnFhMMi7ESCLaR+fge+LOptQQ5fdW9zmS9i6spMMC3fOorARl7pb/1r1b9lwPHyW7zodQmnc Pigcn8si0inCh7bT7bacxx7XomLxki2ts+TndgjuSF5ALGxB95BJeLxyiHRRv8Ob8QCN5qj5YBG MHQBY9HnzyLtnRb/+p8/Psp4+OINykSu7/+ZhFvEJW3+55/Zfssaitp+SNuCmsACrbPPv4VVQdi jJjajAL+ZJKIbpFfSs575WzGMVwG6lHQbSRrpYdKtf1GrnQDszbSjzys7WGbIFSJlj8NvOiuwEU QYHaszrm6IK6mn3ZDKpz/Fm2Ev4FXqikt9OKg9QVaPTWx3Qesx0JPndNRTfprfVnCEklRt0yC6h jJHHksv2AyfKI5Qm0gNK7IN2aVbP9EPZNcd8o5ruTefsbqCuX65 X-Received: by 2002:a05:6a20:7343:b0:3d3:aed2:6f21 with SMTP id adf61e73a8af0-3d5d988fde2mr2031204637.21.1788105793018; Sun, 30 Aug 2026 09:03:13 -0700 (PDT) Received: from nuvole (2.248.212.35.bc.googleusercontent.com. [35.212.248.2]) by smtp.gmail.com with ESMTPSA id 41be03b00d2f7-cc1f3312270sm2839584a12.11.2026.08.30.09.03.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 30 Aug 2026 09:03:12 -0700 (PDT) From: Pengyu Luo To: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Frank Li , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Sakari Ailus , Martin Kepplinger-Novakovic , Mauro Carvalho Chehab , Sebastian Krzyszkowiak Cc: devicetree@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-media@vger.kernel.org, Pengyu Luo Subject: [PATCH v6 4/5] media: hi846: Add 6MP and 8MP modes support Date: Mon, 31 Aug 2026 00:00:24 +0800 Message-ID: <20260830160025.211384-5-mitltlatltl@gmail.com> X-Mailer: git-send-email 2.55.0 In-Reply-To: <20260830160025.211384-1-mitltlatltl@gmail.com> References: <20260830160025.211384-1-mitltlatltl@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260830_090314_129178_5084B04D X-CRM114-Status: GOOD ( 13.88 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi846 is an 8MP sensor, but the upstream driver has only supported 2MP mode for years. This patch adds 6MP and 8MP modes to maximize sensor utilization. Note that these modes require 4-lane MIPI CSI-2, as the downstream driver only exposes 2MP, 6MP, and 8MP configurations in 4-lane operation on the target device. The register sequences are extracted from the downstream Windows driver. Signed-off-by: Pengyu Luo --- v5: - Use separated fields instead of raw register values for PLL cfg (Sakari) --- drivers/media/i2c/hi846.c | 154 +++++++++++++++++++++++++++++++++++++- 1 file changed, 153 insertions(+), 1 deletion(-) diff --git a/drivers/media/i2c/hi846.c b/drivers/media/i2c/hi846.c index 648192521344..719598938638 100644 --- a/drivers/media/i2c/hi846.c +++ b/drivers/media/i2c/hi846.c @@ -1028,6 +1028,106 @@ static const struct hi846_reg mode_1632x1224_mipi_4lane[] = { {HI846_REG_TG_ENABLE, 0x0100}, }; +static const struct hi846_reg mode_3264x1836_config[] = { + {HI846_REG_MODE_SELECT, 0x0000}, + {HI846_REG_Y_ODD_INC_FOBP, 0x1111}, + {HI846_REG_Y_ODD_INC_VACT, 0x1111}, + {HI846_REG_Y_ADDR_START_VACT_H, 0x0172}, + {HI846_REG_Y_ADDR_END_VACT_H, 0x089d}, + {HI846_REG_UNKNOWN_005C, 0x2101}, + {HI846_REG_FLL, 0x09de}, + {HI846_REG_LLP, 0x0ed8}, + {HI846_REG_BINNING_MODE, 0x0022}, + {HI846_REG_HBIN_MODE, 0x0000}, + {HI846_REG_UNKNOWN_0A24, 0x0000}, + {HI846_REG_X_START_H, 0x0000}, + {HI846_REG_X_OUTPUT_SIZE_H, 0x0cc0}, + {HI846_REG_Y_OUTPUT_SIZE_H, 0x072c}, + {HI846_REG_EXPOSURE, 0x09d8}, + + /* For OTP */ + {HI846_REG_UNKNOWN_021C, 0x0001}, + {HI846_REG_UNKNOWN_021E, 0x0235}, + + {HI846_REG_ISP_EN_H, 0x014a}, + {HI846_REG_UNKNOWN_0418, 0x023e}, + {HI846_REG_UNKNOWN_0B02, 0xe04d}, + {HI846_REG_UNKNOWN_0B10, 0x6821}, + {HI846_REG_UNKNOWN_0B12, 0x0120}, + {HI846_REG_UNKNOWN_0B14, 0x0001}, + {HI846_REG_UNKNOWN_2008, 0x38fd}, + {HI846_REG_UNKNOWN_326E, 0x0000}, +}; + +static const struct hi846_reg mode_3264x1836_mipi_4lane[] = { + {HI846_REG_UNKNOWN_0900, 0x0300}, + {HI846_REG_MIPI_TX_OP_MODE, 0xc319}, + {HI846_REG_UNKNOWN_0914, 0xc109}, + {HI846_REG_TCLK_PREPARE, 0x061a}, + {HI846_REG_UNKNOWN_0918, 0x0407}, + {HI846_REG_THS_ZERO, 0x0a0b}, + {HI846_REG_TCLK_POST, 0x0e08}, + {HI846_REG_UNKNOWN_091E, 0x0a00}, + {HI846_REG_UNKNOWN_090C, 0x0427}, + {HI846_REG_UNKNOWN_090E, 0x0059}, + {HI846_REG_UNKNOWN_0954, 0x0089}, + {HI846_REG_UNKNOWN_0956, 0x0000}, + {HI846_REG_UNKNOWN_0958, 0xca80}, + {HI846_REG_UNKNOWN_095A, 0x9240}, + {HI846_REG_PLL_CFG_MIPI2_H, 0x4124}, + {HI846_REG_TG_ENABLE, 0x0100}, +}; + +static const struct hi846_reg mode_3264x2448_config[] = { + {HI846_REG_MODE_SELECT, 0x0000}, + {HI846_REG_Y_ODD_INC_FOBP, 0x1111}, + {HI846_REG_Y_ODD_INC_VACT, 0x1111}, + {HI846_REG_Y_ADDR_START_VACT_H, 0x0040}, + {HI846_REG_Y_ADDR_END_VACT_H, 0x09cf}, + {HI846_REG_UNKNOWN_005C, 0x2101}, + {HI846_REG_FLL, 0x09de}, + {HI846_REG_LLP, 0x0ed8}, + {HI846_REG_BINNING_MODE, 0x0022}, + {HI846_REG_HBIN_MODE, 0x0000}, + {HI846_REG_UNKNOWN_0A24, 0x0000}, + {HI846_REG_X_START_H, 0x0000}, + {HI846_REG_X_OUTPUT_SIZE_H, 0x0cc0}, + {HI846_REG_Y_OUTPUT_SIZE_H, 0x0990}, + {HI846_REG_EXPOSURE, 0x09d8}, + + /* For OTP */ + {HI846_REG_UNKNOWN_021C, 0x0001}, + {HI846_REG_UNKNOWN_021E, 0x0235}, + + {HI846_REG_ISP_EN_H, 0x014a}, + {HI846_REG_UNKNOWN_0418, 0x0000}, + {HI846_REG_UNKNOWN_0B02, 0xe04d}, + {HI846_REG_UNKNOWN_0B10, 0x6821}, + {HI846_REG_UNKNOWN_0B12, 0x0120}, + {HI846_REG_UNKNOWN_0B14, 0x0001}, + {HI846_REG_UNKNOWN_2008, 0x38fd}, + {HI846_REG_UNKNOWN_326E, 0x0000}, +}; + +static const struct hi846_reg mode_3264x2448_mipi_4lane[] = { + {HI846_REG_UNKNOWN_0900, 0x0300}, + {HI846_REG_MIPI_TX_OP_MODE, 0xc319}, + {HI846_REG_UNKNOWN_0914, 0xc109}, + {HI846_REG_TCLK_PREPARE, 0x061a}, + {HI846_REG_UNKNOWN_0918, 0x0407}, + {HI846_REG_THS_ZERO, 0x0a0b}, + {HI846_REG_TCLK_POST, 0x0e08}, + {HI846_REG_UNKNOWN_091E, 0x0a00}, + {HI846_REG_UNKNOWN_090C, 0x0427}, + {HI846_REG_UNKNOWN_090E, 0x0059}, + {HI846_REG_UNKNOWN_0954, 0x0089}, + {HI846_REG_UNKNOWN_0956, 0x0000}, + {HI846_REG_UNKNOWN_0958, 0xca80}, + {HI846_REG_UNKNOWN_095A, 0x9240}, + {HI846_REG_PLL_CFG_MIPI2_H, 0x4124}, + {HI846_REG_TG_ENABLE, 0x0100}, +}; + static const char * const hi846_test_pattern_menu[] = { "Disabled", "Solid Colour", @@ -1136,7 +1236,59 @@ static const struct hi846_mode supported_modes[] = { .width = 1632 * 2, .height = 1224 * 2, }, - } + }, + { + .width = 3264, + .height = 1836, + .mipi_clk_div_2lane = 1, /* dummy */ + .mipi_clk_div_4lane = 2, + .fps = 30, + .frame_len = 2526, + .llp = HI846_LINE_LENGTH, + .reg_list_config = { + .num_of_regs = ARRAY_SIZE(mode_3264x1836_config), + .regs = mode_3264x1836_config, + }, + .reg_list_2lane = { + .num_of_regs = 0, + }, + .reg_list_4lane = { + .num_of_regs = ARRAY_SIZE(mode_3264x1836_mipi_4lane), + .regs = mode_3264x1836_mipi_4lane, + }, + .crop = { + .left = 0x46, + .top = 0x172, + .width = 3264, + .height = 1836, + }, + }, + { + .width = 3264, + .height = 2448, + .mipi_clk_div_2lane = 1, /* dummy */ + .mipi_clk_div_4lane = 2, + .fps = 30, + .frame_len = 2526, + .llp = HI846_LINE_LENGTH, + .reg_list_config = { + .num_of_regs = ARRAY_SIZE(mode_3264x2448_config), + .regs = mode_3264x2448_config, + }, + .reg_list_2lane = { + .num_of_regs = 0, + }, + .reg_list_4lane = { + .num_of_regs = ARRAY_SIZE(mode_3264x2448_mipi_4lane), + .regs = mode_3264x2448_mipi_4lane, + }, + .crop = { + .left = 0x46, + .top = 0x40, + .width = 3264, + .height = 2448, + }, + }, }; struct hi846_datafmt { -- 2.55.0