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([39.170.101.209]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-85da342023asm1398533b3a.0.2026.09.02.06.15.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 02 Sep 2026 06:15:20 -0700 (PDT) From: Zxyan Zhu To: andrew+netdev@lunn.ch, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com Cc: mcoquelin.stm32@gmail.com, alexandre.torgue@foss.st.com, richardcochran@gmail.com, maxime.chevallier@bootlin.com, muhammad.nazim.amirul.nazle.asmade@altera.com, rohan.g.thomas@altera.com, netdev@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Zxyan Zhu Subject: [PATCH net-next v4 2/2] net: stmmac: dwmac-socfpga: mask XGMAC_TSIE during cross-timestamp Date: Wed, 2 Sep 2026 21:14:41 +0800 Message-Id: <20260902131441.322167-3-zxyan0222@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20260902131441.322167-1-zxyan0222@gmail.com> References: <20260902131441.322167-1-zxyan0222@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260902_061522_396415_68846B6F X-CRM114-Status: GOOD ( 14.02 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The Agilex5 smtg_crosststamp() handler arms an internal auxiliary snapshot, toggles GPO0 and then polls XGMAC_INT_STATUS for TSIS in process context to learn that the snapshot is ready. Unlike the Intel cross-timestamp path it does not set STMMAC_FLAG_INT_SNAPSHOT_EN, so it relies on nothing else consuming TSIS. Once XGMAC_TSIE is unmasked (done by a companion change that enables it in XGMAC_INT_DEFAULT_EN), the DWXGMAC2 timestamp interrupt handler runs from hardirq on every timestamp event and clears TSIS by reading XGMAC_TIMESTAMP_STATUS. That read can win the race against the poll loop, which then times out and makes PTP_SYS_OFFSET_PRECISE fail with "Wait for time sync operation timeout". Mask XGMAC_TSIE around the snapshot trigger and FIFO read so the hardirq handler cannot clear TSIS while smtg_crosststamp() owns it, and restore it on every return path. Tested-by: Nazim Amirul Signed-off-by: Zxyan Zhu --- drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c index 1d7f0a57d288..a4d00bf81423 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-socfpga.c @@ -310,6 +310,13 @@ static int smtg_crosststamp(ktime_t *device, struct system_counterval_t *system, if (priv->plat->flags & STMMAC_FLAG_EXT_SNAPSHOT_EN) return -EBUSY; + /* The XGMAC timestamp interrupt handler clears TSIS by reading + * XGMAC_TIMESTAMP_STATUS, which would race with the TSIS poll + * below. Mask XGMAC_TSIE for the duration of the cross-timestamp + * so the handler does not run while we own the snapshot FIFO. + */ + stmmac_mac_irq_modify(priv, XGMAC_TSIE, 0); + mutex_lock(&priv->aux_ts_lock); /* Enable Internal snapshot trigger */ acr_value = readl(ptpaddr + PTP_ACR); @@ -329,6 +336,7 @@ static int smtg_crosststamp(ktime_t *device, struct system_counterval_t *system, break; default: mutex_unlock(&priv->aux_ts_lock); + stmmac_mac_irq_modify(priv, 0, XGMAC_TSIE); return -EINVAL; } writel(acr_value, ptpaddr + PTP_ACR); @@ -353,6 +361,7 @@ static int smtg_crosststamp(ktime_t *device, struct system_counterval_t *system, ret = readl_poll_timeout(priv->ioaddr + XGMAC_INT_STATUS, v, (v & XGMAC_INT_TSIS), 100, 10000); if (ret) { + stmmac_mac_irq_modify(priv, 0, XGMAC_TSIE); netdev_err(priv->dev, "%s: Wait for time sync operation timeout\n", __func__); return ret; @@ -375,6 +384,8 @@ static int smtg_crosststamp(ktime_t *device, struct system_counterval_t *system, read_unlock_irqrestore(&priv->ptp_lock, flags); } + stmmac_mac_irq_modify(priv, 0, XGMAC_TSIE); + get_smtgtime(priv->mii, SMTG_MDIO_ADDR, &smtg_time); system->cycles = smtg_time; -- 2.34.1