From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 593AAC61DD3 for ; Thu, 3 Sep 2026 16:07:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=D+akosZFQ5QP41YaxubimVNRHS2agBcw9WOA6mSrv7M=; b=Vle1B9qgoZv/xrujF1ubIAXzWe 1fACH9CbAyzlMAj/BDf2Egjekpw9mSU46grEs8xubTcQ6NiobwVN4KyVZxIFrS6mJ/RaaHDTJ7S1O q4w+G5rpvOSHVDYDaZ0Whu/XRcERq3sGmKwTissmKnZS5X5XhrofRqxd8i3pnEk2kO2QU7XSRd9fo YEfqTr31qF9HhiAGtZAOb9p2tPCIjgswzL3jKFVd00itgvAh4c99f5v1jkXI5vmhPg/RiK/uCEaXb pFIHPwvyhCvNGdDvW9KBmAMn7JXvDML0KMDbchcLj/RrOIhphY+Dw8t4NuATeHbZOQNT9y8LOgsi/ 1UDmFOnA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.99.1 #2 (Red Hat Linux)) id 1x29xu-000000005ND-3EIr; Thu, 03 Sep 2026 16:07:02 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.99.1 #2 (Red Hat Linux)) id 1x29xr-000000005HE-0nqJ for linux-arm-kernel@lists.infradead.org; Thu, 03 Sep 2026 16:07:00 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 9688E1596; Thu, 3 Sep 2026 09:06:54 -0700 (PDT) Received: from e140010.cambridge.arm.com (e140010.arm.com [10.2.213.25]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 72D7A3F673; Thu, 3 Sep 2026 09:06:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1788451618; bh=NEnXjfVv5d/CW7ayeMoAbfKpJ6fBprkZdANWXzbIgpQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=HivrD1ADxk/dZI56V1/dQ6we5f+wPenrdOfH3Y8PKx+1wpWVhVN5ZvHnPT3vVNqN7 WgOzZbxEoHz4b+sDoqoD0M5tbyUwTM+AevVtsCTTs1vGprJHGqN0m6p026g4eyWwNA /2QXeyRQin1SF71xGOtpSg7BWpp7UEbl/LhfdhJ8= From: Alexandru Elisei To: maz@kernel.org, oupton@kernel.org, fuad.tabba@linux.dev, joey.gouly@arm.com, seiden@linux.ibm.com, suzuki.poulose@arm.com, yuzenghui@huawei.com, linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, will@kernel.org, mark.rutland@arm.com, linux-perf-users@vger.kernel.org, catalin.marinas@arm.com, james.clark@linaro.org Cc: Sudeep Holla Subject: [RFC PATCH v7 11/28] KVM: arm64: Add a new VCPU device control group for SPE Date: Thu, 3 Sep 2026 17:06:06 +0100 Message-ID: <20260903160623.315525-12-alexandru.elisei@arm.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20260903160623.315525-1-alexandru.elisei@arm.com> References: <20260903160623.315525-1-alexandru.elisei@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260903_090659_376877_A5D550C0 X-CRM114-Status: GOOD ( 12.01 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Sudeep Holla Add a new VCPU device control group to control various aspects of KVM's SPE emulation. Functionality will be added in later patches. [ Alexandru E: Major rework ] Signed-off-by: Sudeep Holla Signed-off-by: Alexandru Elisei --- Documentation/virt/kvm/devices/vcpu.rst | 5 +++++ arch/arm64/include/asm/kvm_spe.h | 17 +++++++++++++++++ arch/arm64/include/uapi/asm/kvm.h | 1 + arch/arm64/kvm/guest.c | 10 ++++++++++ arch/arm64/kvm/spe.c | 15 +++++++++++++++ 5 files changed, 48 insertions(+) diff --git a/Documentation/virt/kvm/devices/vcpu.rst b/Documentation/virt/kvm/devices/vcpu.rst index deb5c51bc00c..e0a7fa35dfd2 100644 --- a/Documentation/virt/kvm/devices/vcpu.rst +++ b/Documentation/virt/kvm/devices/vcpu.rst @@ -302,3 +302,8 @@ From the destination VMM process: 7. Write the KVM_VCPU_TSC_OFFSET attribute for every vCPU with the respective value derived in the previous step. + +5. GROUP: KVM_ARM_VCPU_SPE_CTRL +=============================== + +:Architectures: ARM64 diff --git a/arch/arm64/include/asm/kvm_spe.h b/arch/arm64/include/asm/kvm_spe.h index e452da82666d..1327064d0984 100644 --- a/arch/arm64/include/asm/kvm_spe.h +++ b/arch/arm64/include/asm/kvm_spe.h @@ -11,6 +11,10 @@ bool kvm_supports_spe(void); #define vcpu_has_spe(vcpu) \ (vcpu_has_feature(vcpu, KVM_ARM_VCPU_SPE)) + +int kvm_spe_set_attr(struct kvm_vcpu *vcpu, struct kvm_device_attr *attr); +int kvm_spe_get_attr(struct kvm_vcpu *vcpu, struct kvm_device_attr *attr); +int kvm_spe_has_attr(struct kvm_vcpu *vcpu, struct kvm_device_attr *attr); #else static __always_inline bool kvm_supports_spe(void) { @@ -18,6 +22,19 @@ static __always_inline bool kvm_supports_spe(void) } #define vcpu_has_spe(vcpu) false + +static inline int kvm_spe_set_attr(struct kvm_vcpu *vcpu, struct kvm_device_attr *attr) +{ + return -ENXIO; +} +static inline int kvm_spe_get_attr(struct kvm_vcpu *vcpu, struct kvm_device_attr *attr) +{ + return -ENXIO; +} +static inline int kvm_spe_has_attr(struct kvm_vcpu *vcpu, struct kvm_device_attr *attr) +{ + return -ENXIO; +} #endif /* CONFIG_KVM_ARM_SPE */ #endif /* __ARM64_KVM_SPE_H__ */ diff --git a/arch/arm64/include/uapi/asm/kvm.h b/arch/arm64/include/uapi/asm/kvm.h index f7f751c00e6f..e8a68e34be63 100644 --- a/arch/arm64/include/uapi/asm/kvm.h +++ b/arch/arm64/include/uapi/asm/kvm.h @@ -446,6 +446,7 @@ enum { #define KVM_ARM_VCPU_TIMER_IRQ_HPTIMER 3 #define KVM_ARM_VCPU_PVTIME_CTRL 2 #define KVM_ARM_VCPU_PVTIME_IPA 0 +#define KVM_ARM_VCPU_SPE_CTRL 3 /* KVM_IRQ_LINE irq field index values */ #define KVM_ARM_IRQ_VCPU2_SHIFT 28 diff --git a/arch/arm64/kvm/guest.c b/arch/arm64/kvm/guest.c index b01d6622b872..56c5f937fcdb 100644 --- a/arch/arm64/kvm/guest.c +++ b/arch/arm64/kvm/guest.c @@ -25,6 +25,7 @@ #include #include #include +#include #include #include "trace.h" @@ -918,6 +919,9 @@ int kvm_arm_vcpu_arch_set_attr(struct kvm_vcpu *vcpu, case KVM_ARM_VCPU_PVTIME_CTRL: ret = kvm_arm_pvtime_set_attr(vcpu, attr); break; + case KVM_ARM_VCPU_SPE_CTRL: + ret = kvm_spe_set_attr(vcpu, attr); + break; default: ret = -ENXIO; break; @@ -941,6 +945,9 @@ int kvm_arm_vcpu_arch_get_attr(struct kvm_vcpu *vcpu, case KVM_ARM_VCPU_PVTIME_CTRL: ret = kvm_arm_pvtime_get_attr(vcpu, attr); break; + case KVM_ARM_VCPU_SPE_CTRL: + ret = kvm_spe_get_attr(vcpu, attr); + break; default: ret = -ENXIO; break; @@ -964,6 +971,9 @@ int kvm_arm_vcpu_arch_has_attr(struct kvm_vcpu *vcpu, case KVM_ARM_VCPU_PVTIME_CTRL: ret = kvm_arm_pvtime_has_attr(vcpu, attr); break; + case KVM_ARM_VCPU_SPE_CTRL: + ret = kvm_spe_has_attr(vcpu, attr); + break; default: ret = -ENXIO; break; diff --git a/arch/arm64/kvm/spe.c b/arch/arm64/kvm/spe.c index 00908aa2576b..fe45ad4c703a 100644 --- a/arch/arm64/kvm/spe.c +++ b/arch/arm64/kvm/spe.c @@ -58,3 +58,18 @@ bool kvm_supports_spe(void) guard(mutex)(&spe_pmus_lock); return !list_empty(&spe_pmus); } + +int kvm_spe_set_attr(struct kvm_vcpu *vcpu, struct kvm_device_attr *attr) +{ + return -ENXIO; +} + +int kvm_spe_get_attr(struct kvm_vcpu *vcpu, struct kvm_device_attr *attr) +{ + return -ENXIO; +} + +int kvm_spe_has_attr(struct kvm_vcpu *vcpu, struct kvm_device_attr *attr) +{ + return -ENXIO; +} -- 2.43.0