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From: Mostafa Saleh <smostafa@google.com>
To: linux-kernel@vger.kernel.org, kvmarm@lists.linux.dev,
	 linux-arm-kernel@lists.infradead.org
Cc: maz@kernel.org, oupton@kernel.org, seiden@linux.ibm.com,
	 joey.gouly@arm.com, suzuki.poulose@arm.com,
	yuzenghui@huawei.com,  catalin.marinas@arm.com, will@kernel.org,
	vdonnefort@google.com,  tabba@google.com,
	sebastianene@google.com, keirf@google.com,  qperret@google.com,
	linu.cherian@arm.com, Mostafa Saleh <smostafa@google.com>
Subject: [PATCH v3 0/2] KVM: arm64: Add support for BBM level 3
Date: Fri,  4 Sep 2026 13:28:53 +0000	[thread overview]
Message-ID: <20260904132855.638117-1-smostafa@google.com> (raw)

This patch series adds support for BBM level 3 to KVM pgtable.

Changes from v2:
https://lore.kernel.org/all/20260723182140.4025575-1-smostafa@google.com/
- Add extra checks to ensure PTE updates with BBML3 follow the arm
  architecture.
- Limit the extra smp_wmb() to non shared walkers.

Motivation
==========
I have been looking into this for the context of:
- Page table sharing between the host CPU stage-2 and the SMMUv3 for
  protected KVM.
- Use the pagtable code to populate SMMUv3 stage-2 shadowed
  page table [1]

However, BBM level 3 is still useful for CPU only operations as it
avoids intermediately breaking translation.

Design
======
Some of the conditions that BBM level 3 will be useful in (RWHZWS):
1) Changing from block to table
2) Changing from table to block

Initially, I encapsulated the full logic of BBM in one function,
which was not readable, due to different ordering and dealing with
CMO, TLBI.

Instead, I kept the logic into 2 functions, where BBML3 is added in
the make step.

One interesting case, as BBML3 will update the PTE atomically, it
can only know it raced with another core at the point of the cmpxchg
failing, unlike the SW implementation which locks the PTE first.
And as we must issue CMOs to the new mapped page before the update,
that means with BBML3 racing cores will issue redundant CMOs, to
avoid this, we limit the use of BBML3 to systems with FWB and DIC.

Testing
=======
This was tested with:
- C1-Pro cores, unfortunately the version I have does not run
  upstream, I backported the patches to Android kernel (6.18).

- mainline(7.3-rc1) kernel on a Qualcomm X1 with a hacked cpufeature
  as it does not support BBM, I did not see conflict aborts or TLB
  corruption.

I tested with VHE and protected (hvhe) modes, running VMs
(and protected), and running some selftests, that might exercise and
stress this path tools/testing/selftests/kvm:
- demand_paging_test
- memslot_perf_test
- memslot_modification_stress_test
- dirty_log_test

Mostafa Saleh (2):
  KVM: arm64: Add stage2_clean_old_pte()
  KVM: arm64: Support BBM level 3

 arch/arm64/kvm/hyp/pgtable.c | 172 +++++++++++++++++++++++++----------
 1 file changed, 124 insertions(+), 48 deletions(-)

-- 
2.55.0.979.g7e5102b832-goog



             reply	other threads:[~2026-09-04 13:30 UTC|newest]

Thread overview: 3+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-09-04 13:28 Mostafa Saleh [this message]
2026-09-04 13:28 ` [PATCH v3 1/2] KVM: arm64: Add stage2_clean_old_pte() Mostafa Saleh
2026-09-04 13:28 ` [PATCH v3 2/2] KVM: arm64: Support BBM level 3 Mostafa Saleh

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