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Sun, 06 Sep 2026 23:48:57 -0700 (PDT) Received: from volcano9f6e-hostos.amd.com ([165.204.217.251]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-3339bbf1feesm25057807eec.26.2026.09.06.23.48.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 06 Sep 2026 23:48:57 -0700 (PDT) From: Hemanth Selam To: Russell King , Frank Li , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , Aaro Koskinen , Andreas Kemnade , Kevin Hilman , Roger Quadros , Tony Lindgren , Paul Walmsley , Thierry Reding , Jonathan Hunter Cc: linux-arm-kernel@lists.infradead.org, imx@lists.linux.dev, linux-kernel@vger.kernel.org, linux-omap@vger.kernel.org, linux-tegra@vger.kernel.org Subject: [PATCH] ARM: fix typos in comments Date: Mon, 7 Sep 2026 12:18:49 +0530 Message-ID: <20260907064849.23086-1-hemanth.selam@gmail.com> X-Mailer: git-send-email 2.48.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260906_234858_346577_00273E1F X-CRM114-Status: GOOD ( 18.62 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Fix typos in comments, reported by scripts/checkpatch.pl using the misspelling list in scripts/spelling.txt. Only touches comments, no code changes. Assisted-by: Cursor:claude-opus-5 Signed-off-by: Hemanth Selam --- arch/arm/mach-imx/suspend-imx6.S | 2 +- arch/arm/mach-omap2/omap4-common.c | 2 +- arch/arm/mach-omap2/omap_hwmod.c | 6 +++--- arch/arm/mach-omap2/powerdomains7xx_data.c | 2 +- arch/arm/mach-tegra/pm.c | 2 +- 5 files changed, 7 insertions(+), 7 deletions(-) diff --git a/arch/arm/mach-imx/suspend-imx6.S b/arch/arm/mach-imx/suspend-imx6.S index 63ccc2d0e920..3f8670296358 100644 --- a/arch/arm/mach-imx/suspend-imx6.S +++ b/arch/arm/mach-imx/suspend-imx6.S @@ -234,7 +234,7 @@ set_mmdc_io_lpm_done: * mask all GPC interrupts before * enabling the RBC counters to * avoid the counter starting too - * early if an interupt is already + * early if an interrupt is already * pending. */ ldr r11, [r0, #PM_INFO_MX6Q_GPC_V_OFFSET] diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c index 5d924b85b694..633451b6f548 100644 --- a/arch/arm/mach-omap2/omap4-common.c +++ b/arch/arm/mach-omap2/omap4-common.c @@ -96,7 +96,7 @@ static void omap4_mb(void) * interconnects. * * This situation can happen only when the idle is initiated by a Master - * Request Disconnection (which is trigged by software when executing WFI + * Request Disconnection (which is triggered by software when executing WFI * on the CPU). * * The work-around for this errata needs all the initiators connected diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index 03cd523dff87..0f4ba19804c6 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -646,7 +646,7 @@ static struct clockdomain *_get_clkdm(struct omap_hwmod *oh) * @oh: struct omap_hwmod * * * Prevent the hardware module @oh from entering idle while the - * hardare module initiator @init_oh is active. Useful when a module + * hardware module initiator @init_oh is active. Useful when a module * will be accessed by a particular initiator (e.g., if a module will * be accessed by the IVA, there should be a sleepdep between the IVA * initiator and the module). Only applies to modules in smart-idle @@ -674,7 +674,7 @@ static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh) * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active * @oh: struct omap_hwmod * * - * Allow the hardware module @oh to enter idle while the hardare + * Allow the hardware module @oh to enter idle while the hardware * module initiator @init_oh is active. Useful when a module will not * be accessed by a particular initiator (e.g., if a module will not * be accessed by the IVA, there should be no sleepdep between the IVA @@ -1706,7 +1706,7 @@ static int _ocp_softreset(struct omap_hwmod *oh) return -EINVAL; } - /* For some modules, all optionnal clocks need to be enabled as well */ + /* For some modules, all optional clocks need to be enabled as well */ if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET) _enable_optional_clocks(oh); diff --git a/arch/arm/mach-omap2/powerdomains7xx_data.c b/arch/arm/mach-omap2/powerdomains7xx_data.c index 921cb1b29cb4..df13451bd0f4 100644 --- a/arch/arm/mach-omap2/powerdomains7xx_data.c +++ b/arch/arm/mach-omap2/powerdomains7xx_data.c @@ -223,7 +223,7 @@ static struct powerdomain mpu_7xx_pwrdm = { }, }; -/* l3init_7xx_pwrdm: L3 initators pheripherals power domain */ +/* l3init_7xx_pwrdm: L3 initiators pheripherals power domain */ static struct powerdomain l3init_7xx_pwrdm = { .name = "l3init_pwrdm", .prcm_offs = DRA7XX_PRM_L3INIT_INST, diff --git a/arch/arm/mach-tegra/pm.c b/arch/arm/mach-tegra/pm.c index b21f51b8e19e..d7bc21bdb519 100644 --- a/arch/arm/mach-tegra/pm.c +++ b/arch/arm/mach-tegra/pm.c @@ -257,7 +257,7 @@ static int tegra_sleep_core(unsigned long v2p) * tegra_lp1_iram_hook * * Hooking the address of LP1 reset vector and SDRAM self-refresh code in - * SDRAM. These codes not be copied to IRAM in this fuction. We need to + * SDRAM. These codes not be copied to IRAM in this function. We need to * copy these code to IRAM before LP0/LP1 suspend and restore the content * of IRAM after resume. */ -- 2.48.1