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Tue, 08 Sep 2026 16:51:41 +0200 (CEST) Received: by jupiter.universe (Postfix, from userid 1000) id 9949E48003D; Tue, 08 Sep 2026 16:51:40 +0200 (CEST) From: Sebastian Reichel Date: Tue, 08 Sep 2026 16:51:26 +0200 Subject: [PATCH v6 08/10] PCI: dw-rockchip: Set broken L1SS resume flag MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260908-rockchip-pcie-system-suspend-v6-8-fbabcca9921b@collabora.com> References: <20260908-rockchip-pcie-system-suspend-v6-0-fbabcca9921b@collabora.com> In-Reply-To: <20260908-rockchip-pcie-system-suspend-v6-0-fbabcca9921b@collabora.com> To: Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84ski?= , Manivannan Sadhasivam , Rob Herring , Bjorn Helgaas , Heiko Stuebner , Philipp Zabel , Jingoo Han , Shawn Lin , Liam Girdwood , Mark Brown , "Yury Norov (NVIDIA)" , Nicolas Frattaroli Cc: Alexey Charkov , linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@collabora.com, Sebastian Reichel X-Mailer: b4 0.16.0 X-Developer-Signature: v=1; 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a=openpgp; fpr=EF660D07463F8B726A795413D8EED7F3C83BFA9A X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260908_155148_677982_0B1C0545 X-CRM114-Status: GOOD ( 12.87 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Setup the broken_l1ss_resume flag, so that pci_suspend_retains_context() returns false on the Rockchip platform allowing PCIe peripheral device drivers to act upon. Signed-off-by: Sebastian Reichel --- drivers/pci/controller/dwc/pcie-dw-rockchip.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/drivers/pci/controller/dwc/pcie-dw-rockchip.c b/drivers/pci/controller/dwc/pcie-dw-rockchip.c index 17530507e41b..47d9cab909bc 100644 --- a/drivers/pci/controller/dwc/pcie-dw-rockchip.c +++ b/drivers/pci/controller/dwc/pcie-dw-rockchip.c @@ -458,6 +458,21 @@ static int rockchip_pcie_host_init(struct dw_pcie_rp *pp) return 0; } +static void rockchip_pcie_host_post_init(struct dw_pcie_rp *pp) +{ + /* + * During system suspend, the Rockchip RC driver effectively powers off + * the controller. If the link is in L1SS and the endpoint asserts + * CLKREQ# to exit L1SS, the time required to wake the system and + * restore the PHY/REFCLK may exceed the L1SS exit timing + * (L10_REFCLK_ON + T_COMMONMODE), resulting in Link Down (LDn) and a + * reset of the endpoint. Set this flag to indicate this limitation to + * client drivers so that they can avoid relying on device state being + * preserved during system suspend. + */ + pp->bridge->broken_l1ss_resume = true; +} + static void rockchip_pcie_pme_turn_off(struct dw_pcie_rp *pp) { struct dw_pcie *pci = to_dw_pcie_from_pp(pp); @@ -497,6 +512,7 @@ static void rockchip_pcie_pme_turn_off(struct dw_pcie_rp *pp) static const struct dw_pcie_host_ops rockchip_pcie_host_ops = { .init = rockchip_pcie_host_init, + .post_init = rockchip_pcie_host_post_init, .pme_turn_off = rockchip_pcie_pme_turn_off, }; -- 2.53.0