From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0B44AC79FB7 for ; Thu, 10 Sep 2026 05:24:06 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: Content-Type:MIME-Version:Message-ID:Date:Subject:Cc:To:From:Reply-To: Content-ID:Content-Description:Resent-Date:Resent-From:Resent-Sender: Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References:List-Owner; bh=AkrUoyd0rKa+tTVoyNIa2h+axR97xJ+HeRyCUQvO/vs=; b=EQQcDe5QwYZabvye4+8FaiEgcV jBRhkYmzVvGdjJMuZYTGRCsgWXbLANXjNUXMURPfGlbsD/10DLQ9UeVSAc74ITwsV4r9JnbXPF3C7 GF07p4z0cDzy//Ucf6oj3QF8PcUM6iALP93HCneVKPP+u8/hGweT/LZ1g41k8mA3CKsINwAMMREkG LuCHrioLbN19aXq7vT7MqPwGfreQeT3cc8gRiguuckDZgPWnggRElpjsRKwBmwrvbke8XDgir9vgX 4w5X8CmMcP+eSjRio4eyvLiJTUZUbaIHTjEpLOvaqzRuDrwGvA87tNTsTZtRdlR0oksk2nm8KVjvz AbOkLn3w==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.99.1 #2 (Red Hat Linux)) id 1x4XGQ-0000000DQpW-2PGo; Thu, 10 Sep 2026 05:23:58 +0000 Received: from mx.nabladev.com ([178.251.229.89]) by bombadil.infradead.org with esmtps (Exim 4.99.1 #2 (Red Hat Linux)) id 1x4XGN-0000000DQou-0Hr7 for linux-arm-kernel@lists.infradead.org; Thu, 10 Sep 2026 05:23:57 +0000 Received: from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon) with ESMTPSA id 595D51029BB; Thu, 10 Sep 2026 07:23:42 +0200 (CEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nabladev.com; s=dkim; t=1789017826; h=from:subject:date:message-id:to:cc:mime-version:content-type: content-transfer-encoding; bh=AkrUoyd0rKa+tTVoyNIa2h+axR97xJ+HeRyCUQvO/vs=; b=Cmm5mRcJT4Y+m3CBIe+AnYgQHg+ZufLrSzjYO+V/qKf7YwZeGNfdgSINu6xKyHxOzq8vGB bFB6Z8qIn/DbSiUs0nZ5wmiXQiSy9fKvQ62z9PEmgxoU5PPNhGR0lxD0y2gfseywkV+Io9 Eh6x7/KIksHzFEduYXeYFL2dQ6UeXqn0NLs9J76TvCeGYuU495APwCKeTm4IN+CZSXxD1n hXakJSFYqbitaW/3lZeq3j+6YRR344bnVmajEyNYjwWla4vhdwu8aAWE900uWlsXnOf/tt 5pzFNfvE0e4VUXIewbJuXzLyDjrwSLJEuJNnHAm6URjPpfY/xXwectdDD6CbOg== From: Marek Vasut To: linux-usb@vger.kernel.org Cc: Marek Vasut , Pankaj Dev , =?UTF-8?q?Cl=C3=A9ment=20Le=20Goffic?= , Gatien Chevallier , Alexandre Torgue , Conor Dooley , Fabrice Gasnier , Greg Kroah-Hartman , Krzysztof Kozlowski , Maxime Coquelin , Rob Herring , Thinh Nguyen , devicetree@vger.kernel.org, kernel@dh-electronics.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-stm32@st-md-mailman.stormreply.com Subject: [PATCH v5 1/2] dt-bindings: usb: dwc3: Document ST STM32MP2 DWC3 xHCI USB controller Date: Thu, 10 Sep 2026 07:22:40 +0200 Message-ID: <20260910052340.246717-1-marex@nabladev.com> X-Mailer: git-send-email 2.53.0 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Last-TLS-Session-Version: TLSv1.3 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260909_222355_502737_C782BE9B X-CRM114-Status: GOOD ( 13.04 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The ST STM32MP2 SoC contains single instance of DWC3 USB controller with glue logic wrapper around it controlled by syscon. Document the glue logic and DWC3 controller. Co-developed-by: Pankaj Dev Signed-off-by: Pankaj Dev Co-developed-by: Clément Le Goffic Signed-off-by: Clément Le Goffic Co-developed-by: Gatien Chevallier Signed-off-by: Gatien Chevallier Signed-off-by: Marek Vasut --- Cc: Alexandre Torgue Cc: Conor Dooley Cc: Fabrice Gasnier Cc: Greg Kroah-Hartman Cc: Krzysztof Kozlowski Cc: Marek Vasut Cc: Maxime Coquelin Cc: Rob Herring Cc: Thinh Nguyen Cc: devicetree@vger.kernel.org Cc: kernel@dh-electronics.com Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Cc: linux-stm32@st-md-mailman.stormreply.com Cc: linux-usb@vger.kernel.org --- V2: Fix up Sob/Cdb lines V3: - Document maximum-speed - Switch resets to maxItems: 1 - Drop label from example - Use generic over-current-active-low - Use ref: snps,dwc3-common.yaml and drop generic dr_mode/maximum-speed/phys/phy-names V4: - Split this from series arm64: dts: phy: st: usb: Add STM32MP2 USB support https://lore.kernel.org/all/20260822074816.548662-1-marex@nabladev.com/ V5: No change --- .../bindings/usb/st,stm32mp25-dwc3.yaml | 97 +++++++++++++++++++ 1 file changed, 97 insertions(+) create mode 100644 Documentation/devicetree/bindings/usb/st,stm32mp25-dwc3.yaml diff --git a/Documentation/devicetree/bindings/usb/st,stm32mp25-dwc3.yaml b/Documentation/devicetree/bindings/usb/st,stm32mp25-dwc3.yaml new file mode 100644 index 0000000000000..96bd557327252 --- /dev/null +++ b/Documentation/devicetree/bindings/usb/st,stm32mp25-dwc3.yaml @@ -0,0 +1,97 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/usb/st,stm32mp25-dwc3.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: STMicroelectronics STM32 MPU DWC3 USB SoC controller + +description: + The STM32 MPU DWC3 USB SoC controller block supports both + Host(SS/HS/FS/LS) and Device(SS/HS/FS) mode operation + +maintainers: + - Fabrice Gasnier + - Marek Vasut + +allOf: + - $ref: snps,dwc3-common.yaml# + +properties: + compatible: + const: st,stm32mp25-dwc3 + + reg: + maxItems: 1 + + access-controllers: + maxItems: 1 + + clocks: + minItems: 3 + maxItems: 3 + + clock-names: + items: + - const: ref + - const: bus_early + - const: suspend + + interrupts: + maxItems: 1 + + resets: + maxItems: 1 + + over-current-active-low: + type: boolean + description: Over-Current signal polarity is active-low + + st,syscfg: + $ref: /schemas/types.yaml#/definitions/phandle-array + description: Phandle to system configuration controller. + items: + - items: + - description: phandle to syscfg + - description: USB3DR control offset within syscfg + + st,enable-port-power-control: + type: boolean + description: Enable Host-Mode Port Power Control (bit-3 of capability param HCCPARAMS) + + st,vbusen-active-low: + type: boolean + description: VBUS-ENABLE signal polarity is active-low + +required: + - compatible + - reg + - clocks + - clock-names + - interrupts + - phys + - phy-names + - resets + - st,syscfg + +unevaluatedProperties: false + +examples: + - | + #include + #include + #include + + usb@48300000 { + compatible = "st,stm32mp25-dwc3"; + reg = <0x48300000 0x100000>; + clocks = <&rcc CK_KER_USB2PHY2>, <&rcc CK_BUS_USB3DR>, <&rcc CK_KER_USB2PHY2>; + clock-names = "ref", "bus_early", "suspend"; + interrupts = ; + phys = <&usb2_phy>, <&usb3_phy>; + phy-names = "usb2-phy", "usb3-phy"; + resets = <&rcc USB3DR_R>; + over-current-active-low; + st,syscfg = <&syscfg 0x4800>; + st,vbusen-active-low; + }; -- 2.53.0