From: Andre Przywara <andre.przywara@arm.com>
To: Linus Walleij <linusw@kernel.org>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Chen-Yu Tsai <wens@kernel.org>,
Jernej Skrabec <jernej.skrabec@gmail.com>,
Samuel Holland <samuel@sholland.org>
Cc: Jerome Brunet <jbrunet@baylibre.com>, Yixun Lan <dlan@gentoo.org>,
Enzo Adriano <enzo.adriano.code@gmail.com>,
Vinicius Pedrosa <vinicius.eduardo.pedrosa@gmail.com>,
linux-gpio@vger.kernel.org, devicetree@vger.kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-sunxi@lists.linux.dev
Subject: [PATCH 1/7] pinctrl: sunxi: rename SUNXI_PINCTRL_NEW_REG_LAYOUT
Date: Thu, 10 Sep 2026 15:35:12 +0200 [thread overview]
Message-ID: <20260910133519.459011-2-andre.przywara@arm.com> (raw)
In-Reply-To: <20260910133519.459011-1-andre.przywara@arm.com>
After keeping the pinctrl IP mostly register compatible for almost a
decade, in 2021 Allwinner introduced some changes to the register
layout, which made us use a flag called SUNXI_PINCTRL_NEW_REG_LAYOUT.
Now with their latest SoC (A733), Allwinner changed the pinctrl IP
again, so "NEW" isn't really a fitting name anymore.
Rename the symbol to SUNXI_PINCTRL_NCAT2_REG_LAYOUT, with "NCAT2" being
a name often used in vendor source code to signify this "new" generation
of SoCs.
Just a rename of the symbol, no actual code changes.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
---
drivers/pinctrl/sunxi/pinctrl-sun20i-d1.c | 2 +-
drivers/pinctrl/sunxi/pinctrl-sun55i-a523-r.c | 2 +-
drivers/pinctrl/sunxi/pinctrl-sun55i-a523.c | 2 +-
drivers/pinctrl/sunxi/pinctrl-sunxi.c | 4 ++--
drivers/pinctrl/sunxi/pinctrl-sunxi.h | 2 +-
5 files changed, 6 insertions(+), 6 deletions(-)
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun20i-d1.c b/drivers/pinctrl/sunxi/pinctrl-sun20i-d1.c
index 8efe35b77af4d..37a60e5d1163b 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun20i-d1.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun20i-d1.c
@@ -821,7 +821,7 @@ static const struct sunxi_pinctrl_desc d1_pinctrl_data = {
static int d1_pinctrl_probe(struct platform_device *pdev)
{
return sunxi_pinctrl_init_with_flags(pdev, &d1_pinctrl_data,
- SUNXI_PINCTRL_NEW_REG_LAYOUT);
+ SUNXI_PINCTRL_NCAT2_REG_LAYOUT);
}
static const struct of_device_id d1_pinctrl_match[] = {
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun55i-a523-r.c b/drivers/pinctrl/sunxi/pinctrl-sun55i-a523-r.c
index 462aa1c4a5fa6..9e07fbb5be7cb 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun55i-a523-r.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun55i-a523-r.c
@@ -35,7 +35,7 @@ static int a523_r_pinctrl_probe(struct platform_device *pdev)
return sunxi_pinctrl_dt_table_init(pdev, a523_r_nr_bank_pins,
a523_r_irq_bank_muxes,
&a523_r_pinctrl_data,
- SUNXI_PINCTRL_NEW_REG_LAYOUT);
+ SUNXI_PINCTRL_NCAT2_REG_LAYOUT);
}
static const struct of_device_id a523_r_pinctrl_match[] = {
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun55i-a523.c b/drivers/pinctrl/sunxi/pinctrl-sun55i-a523.c
index b6f78f1f30ac4..801f62abc93df 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun55i-a523.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun55i-a523.c
@@ -34,7 +34,7 @@ static int a523_pinctrl_probe(struct platform_device *pdev)
return sunxi_pinctrl_dt_table_init(pdev, a523_nr_bank_pins,
a523_irq_bank_muxes,
&a523_pinctrl_data,
- SUNXI_PINCTRL_NEW_REG_LAYOUT |
+ SUNXI_PINCTRL_NCAT2_REG_LAYOUT |
SUNXI_PINCTRL_ELEVEN_BANKS);
}
diff --git a/drivers/pinctrl/sunxi/pinctrl-sunxi.c b/drivers/pinctrl/sunxi/pinctrl-sunxi.c
index 25489beeb3125..bc6948e3fb495 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sunxi.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.c
@@ -1107,7 +1107,7 @@ static int sunxi_pinctrl_irq_request_resources(struct irq_data *d)
muxval = (readl(pctl->membase + reg) & mask) >> shift;
/* Change muxing to GPIO INPUT mode if at reset value */
- if (pctl->flags & SUNXI_PINCTRL_NEW_REG_LAYOUT)
+ if (pctl->flags & SUNXI_PINCTRL_NCAT2_REG_LAYOUT)
disabled_mux = SUN4I_FUNC_DISABLED_NEW;
else
disabled_mux = SUN4I_FUNC_DISABLED_OLD;
@@ -1589,7 +1589,7 @@ int sunxi_pinctrl_init_with_flags(struct platform_device *pdev,
pctl->dev = &pdev->dev;
pctl->desc = desc;
pctl->flags = flags;
- if (flags & SUNXI_PINCTRL_NEW_REG_LAYOUT) {
+ if (flags & SUNXI_PINCTRL_NCAT2_REG_LAYOUT) {
pctl->bank_mem_size = D1_BANK_MEM_SIZE;
pctl->pull_regs_offset = D1_PULL_REGS_OFFSET;
pctl->dlevel_field_width = D1_DLEVEL_FIELD_WIDTH;
diff --git a/drivers/pinctrl/sunxi/pinctrl-sunxi.h b/drivers/pinctrl/sunxi/pinctrl-sunxi.h
index 0daf7600e2fb0..c519055e31b73 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sunxi.h
+++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.h
@@ -90,7 +90,7 @@
#define SUN4I_FUNC_DISABLED_NEW 15
#define SUNXI_PINCTRL_VARIANT_MASK GENMASK(7, 0)
-#define SUNXI_PINCTRL_NEW_REG_LAYOUT BIT(8)
+#define SUNXI_PINCTRL_NCAT2_REG_LAYOUT BIT(8)
#define SUNXI_PINCTRL_PORTF_SWITCH BIT(9)
#define SUNXI_PINCTRL_ELEVEN_BANKS BIT(10)
--
2.47.3
next prev parent reply other threads:[~2026-09-10 13:35 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-10 13:35 [PATCH 0/7] pinctrl: sunxi: Add Allwinner A733 support Andre Przywara
2026-09-10 13:35 ` Andre Przywara [this message]
2026-09-10 13:35 ` [PATCH 2/7] pinctrl: sunxi: only use PortK special handling on A523 Andre Przywara
2026-09-10 14:56 ` Chen-Yu Tsai
2026-09-10 13:35 ` [PATCH 3/7] pinctrl: sunxi: refactor IRQ register accessors Andre Przywara
2026-09-10 13:35 ` [PATCH 4/7] pinctrl: sunxi: support A733 generation MMIO register layout Andre Przywara
2026-09-10 13:35 ` [PATCH 5/7] dt-bindings: pinctrl: add compatible for Allwinner A733 Andre Przywara
2026-09-10 13:35 ` [PATCH 6/7] pinctrl: sunxi: a523-r: add a733-r compatible string Andre Przywara
2026-09-10 13:35 ` [PATCH 7/7] pinctrl: sunxi: add support for the Allwinner A733 Andre Przywara
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