From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 2A884C88E75 for ; Mon, 14 Sep 2026 10:22:47 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-Id:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=ruOzcv+D+BxVsPeKahs59VOb0a8BLibO32bROQwkZCU=; b=2ixwIXvnGhmFfyiJqhMwr/XHVU E1P/ncIQNM/4yMZrjFm6KeIWTtuK00KAhf3EGb8tF6aTL7e6JNn8V/eQiFwr3e6WRJDvZpjwhN02l wo4vd5i9aKYcbYP+g2FWFf0yKp8G/w6S5/4JynTObNyQ3nRM3Z25Z9aAx9nc0/90nYIzykeUrBLl9 jMQpQ542raOnrOWO0j+Loy3z4W7cvS3NBS7x7BV4BOI1wRcec5DA/7WTqiVQvad8txSW7pqgpJVPc ltGwVxlvnB7ywiZLurQzJnqyuL7yYmbadFqQKg6ezlY5ghdwonrKtGnot8PxbJpxnPVSazLTgnjMp NhkWlX0A==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.99.1 #2 (Red Hat Linux)) id 1x63pU-000000036A1-2reh; Mon, 14 Sep 2026 10:22:28 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.99.1 #2 (Red Hat Linux)) id 1x63p0-000000035eu-1rNR for linux-arm-kernel@lists.infradead.org; Mon, 14 Sep 2026 10:21:59 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 5A2B61576; Mon, 14 Sep 2026 03:21:54 -0700 (PDT) Received: from login2.euhpc2.arm.com (login2.euhpc2.arm.com [10.58.100.22]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id D97603F7B4; Mon, 14 Sep 2026 03:21:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1789381318; bh=tvf7ArjpKkmb1RSjXAScuFu8Jz5Sqa7SrQTmVWO3zxE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=mXQJzhkCn2Pgl8U9yzul/CKvraBqsz9dVmqxiwJDnnY4vb2wsPPFltj3/SXqHs9eh ckIip3Ts50w4YgTG3MiAD8+lmI8hMCFbU4ydsB5WjMzo+B2ZQSwjgSe/ZdrCE07VvJ nNXoko0hQr2p/xvxCnXTYofnAmer/yvMB5kBSZCY= From: Vladimir Murzin To: linux-arm-kernel@lists.infradead.org Cc: catalin.marinas@arm.com, will@kernel.org, mark.rutland@arm.com, maz@kernel.org, lpieralisi@kernel.org, ruanjinjie@huawei.com, liaochang1@huawei.com Subject: [PATCH 21/38] arm64: ptrace: Add PSR_ALLINT_BIT Date: Mon, 14 Sep 2026 11:20:45 +0100 Message-Id: <20260914102102.68597-22-vladimir.murzin@arm.com> X-Mailer: git-send-email 2.24.0 In-Reply-To: <20260914102102.68597-1-vladimir.murzin@arm.com> References: <20260914102102.68597-1-vladimir.murzin@arm.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260914_032158_525650_DE56CC02 X-CRM114-Status: GOOD ( 10.59 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Ada Couprie Diaz When FEAT_NMI is implemented, ALLINT is part of PSTATE and will be saved to SPSR on exception entry. As it can mask interrupts, depending on configuration, we will need to check its value in interruted tasks, so add the corresponding bit to ptrace.h. Given its impact on interrupt and NMI masking, use it to update `print_pstate()` so that it displays ALLINT state. Display it after DAIF so that interrupt masking fields are together. Signed-off-by: Ada Couprie Diaz Signed-off-by: Vladimir Murzin Reviewed-by: Jinjie Ruan --- arch/arm64/include/uapi/asm/ptrace.h | 1 + arch/arm64/kernel/process.c | 3 ++- 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/arch/arm64/include/uapi/asm/ptrace.h b/arch/arm64/include/uapi/asm/ptrace.h index 15649a253a57..c4042da27d80 100644 --- a/arch/arm64/include/uapi/asm/ptrace.h +++ b/arch/arm64/include/uapi/asm/ptrace.h @@ -48,6 +48,7 @@ #define PSR_D_BIT 0x00000200 #define PSR_BTYPE_MASK 0x00000c00 #define PSR_SSBS_BIT 0x00001000 +#define PSR_ALLINT_BIT 0x00002000 #define PSR_PAN_BIT 0x00400000 #define PSR_UAO_BIT 0x00800000 #define PSR_DIT_BIT 0x01000000 diff --git a/arch/arm64/kernel/process.c b/arch/arm64/kernel/process.c index 0fd09136d398..c77d1e2b1b3a 100644 --- a/arch/arm64/kernel/process.c +++ b/arch/arm64/kernel/process.c @@ -183,7 +183,7 @@ static void print_pstate(struct pt_regs *regs) const char *btype_str = btypes[(pstate & PSR_BTYPE_MASK) >> PSR_BTYPE_SHIFT]; - printk("pstate: %08llx (%c%c%c%c %c%c%c%c %cPAN %cUAO %cTCO %cDIT %cSSBS BTYPE=%s)\n", + printk("pstate: %08llx (%c%c%c%c %c%c%c%c %cALLINT %cPAN %cUAO %cTCO %cDIT %cSSBS BTYPE=%s)\n", pstate, pstate & PSR_N_BIT ? 'N' : 'n', pstate & PSR_Z_BIT ? 'Z' : 'z', @@ -193,6 +193,7 @@ static void print_pstate(struct pt_regs *regs) pstate & PSR_A_BIT ? 'A' : 'a', pstate & PSR_I_BIT ? 'I' : 'i', pstate & PSR_F_BIT ? 'F' : 'f', + pstate & PSR_ALLINT_BIT ? '+' : '-', pstate & PSR_PAN_BIT ? '+' : '-', pstate & PSR_UAO_BIT ? '+' : '-', pstate & PSR_TCO_BIT ? '+' : '-', -- 2.34.1