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charset=utf-8 Content-Disposition: inline In-Reply-To: <20260831-isi_imx952-v2-2-fafdb4b446d4@oss.nxp.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260914_170152_950762_25369337 X-CRM114-Status: GOOD ( 21.39 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Mon, Aug 31, 2026 at 11:36:57AM +0800, Guoniu Zhou wrote: > The ISI output format field width differs across SoC generations: > i.MX8 series (MN/MP/QM/QXP) use a 6-bit field (bits 29:24), while > from i.MX8ULP onwards (including i.MX91/93/95/952) the field is > extended to 7 bits (bits 30:24) to support RAW32 and RAW14 formats. > > Replace the static CHNL_IMG_CTRL_FORMAT_MASK with a per-platform > format_mask in mxc_isi_plat_data to correctly match the hardware > format field width for each SoC. > > Reviewed-by: Frank Li > Signed-off-by: Guoniu Zhou > --- > Changes in v2: > - Add Reviewed-by tag from Frank Li > --- > drivers/media/platform/nxp/imx8-isi/imx8-isi-core.c | 8 ++++++++ > drivers/media/platform/nxp/imx8-isi/imx8-isi-core.h | 1 + > drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c | 3 ++- > drivers/media/platform/nxp/imx8-isi/imx8-isi-regs.h | 1 - > 4 files changed, 11 insertions(+), 2 deletions(-) > > diff --git a/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.c b/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.c > index f2a8eb82fbfd..c1c16dbc1539 100644 > --- a/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.c > +++ b/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.c > @@ -297,6 +297,7 @@ static const struct mxc_isi_plat_data mxc_imx8mn_data = { > .reg_offset = 0, > .ier_reg = &mxc_imx8_isi_ier_v1, > .set_thd = &mxc_imx8_isi_thd_v1, > + .format_mask = GENMASK(29, 24), > .buf_active_reverse = false, > .gasket_ops = &mxc_imx8_gasket_ops, > .has_36bit_dma = false, > @@ -309,6 +310,7 @@ static const struct mxc_isi_plat_data mxc_imx8mp_data = { > .reg_offset = 0x2000, > .ier_reg = &mxc_imx8_isi_ier_v2, > .set_thd = &mxc_imx8_isi_thd_v1, > + .format_mask = GENMASK(29, 24), > .buf_active_reverse = true, > .gasket_ops = &mxc_imx8_gasket_ops, > .has_36bit_dma = true, > @@ -322,6 +324,7 @@ static const struct mxc_isi_plat_data mxc_imx8qm_data = { > .reg_offset = 0x10000, > .ier_reg = &mxc_imx8_isi_ier_qm, > .set_thd = &mxc_imx8_isi_thd_v1, > + .format_mask = GENMASK(29, 24), > .buf_active_reverse = true, > .has_36bit_dma = false, > }; > @@ -334,6 +337,7 @@ static const struct mxc_isi_plat_data mxc_imx8qxp_data = { > .reg_offset = 0x10000, > .ier_reg = &mxc_imx8_isi_ier_v2, > .set_thd = &mxc_imx8_isi_thd_v1, > + .format_mask = GENMASK(29, 24), > .buf_active_reverse = true, > .has_36bit_dma = false, > }; > @@ -345,6 +349,7 @@ static const struct mxc_isi_plat_data mxc_imx8ulp_data = { > .reg_offset = 0x0, > .ier_reg = &mxc_imx8_isi_ier_v2, > .set_thd = &mxc_imx8_isi_thd_v1, > + .format_mask = GENMASK(30, 24), > .buf_active_reverse = true, > .has_36bit_dma = false, > }; > @@ -356,6 +361,7 @@ static const struct mxc_isi_plat_data mxc_imx91_data = { > .reg_offset = 0, > .ier_reg = &mxc_imx8_isi_ier_v2, > .set_thd = &mxc_imx8_isi_thd_v1, > + .format_mask = GENMASK(30, 24), > .buf_active_reverse = true, > .has_36bit_dma = false, > }; > @@ -367,6 +373,7 @@ static const struct mxc_isi_plat_data mxc_imx93_data = { > .reg_offset = 0, > .ier_reg = &mxc_imx8_isi_ier_v2, > .set_thd = &mxc_imx8_isi_thd_v1, > + .format_mask = GENMASK(30, 24), > .buf_active_reverse = true, > .gasket_ops = &mxc_imx93_gasket_ops, > .has_36bit_dma = false, > @@ -380,6 +387,7 @@ static const struct mxc_isi_plat_data mxc_imx95_data = { > .reg_offset = 0x10000, > .ier_reg = &mxc_imx8_isi_ier_v2, > .set_thd = &mxc_imx8_isi_thd_v1, > + .format_mask = GENMASK(30, 24), > .buf_active_reverse = true, > .has_36bit_dma = true, > }; > diff --git a/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.h b/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.h > index 58b47335afc7..05c21c448b93 100644 > --- a/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.h > +++ b/drivers/media/platform/nxp/imx8-isi/imx8-isi-core.h > @@ -175,6 +175,7 @@ struct mxc_isi_plat_data { > const struct mxc_isi_ier_reg *ier_reg; > const struct mxc_isi_set_thd *set_thd; > const struct mxc_gasket_ops *gasket_ops; > + u32 format_mask; > bool buf_active_reverse; > bool has_36bit_dma; > }; > diff --git a/drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c b/drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c > index 6aa760ce3605..2405f7d33d0a 100644 > --- a/drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c > +++ b/drivers/media/platform/nxp/imx8-isi/imx8-isi-hw.c > @@ -410,13 +410,14 @@ void mxc_isi_channel_set_output_format(struct mxc_isi_pipe *pipe, > const struct mxc_isi_format_info *info, > struct v4l2_pix_format_mplane *format) > { > + const struct mxc_isi_plat_data *pdata = pipe->isi->pdata; > u32 val; > > /* set outbuf format */ > dev_dbg(pipe->isi->dev, "output format %p4cc", &format->pixelformat); > > val = mxc_isi_read(pipe, CHNL_IMG_CTRL); > - val &= ~CHNL_IMG_CTRL_FORMAT_MASK; > + val &= ~pdata->format_mask; > val |= CHNL_IMG_CTRL_FORMAT(info->isi_out_format); > mxc_isi_write(pipe, CHNL_IMG_CTRL, val); > > diff --git a/drivers/media/platform/nxp/imx8-isi/imx8-isi-regs.h b/drivers/media/platform/nxp/imx8-isi/imx8-isi-regs.h > index e795f4daf3ff..7c4e736f4651 100644 > --- a/drivers/media/platform/nxp/imx8-isi/imx8-isi-regs.h > +++ b/drivers/media/platform/nxp/imx8-isi/imx8-isi-regs.h > @@ -39,7 +39,6 @@ > /* Channel Image Control Register */ > #define CHNL_IMG_CTRL 0x0004 > #define CHNL_IMG_CTRL_FORMAT(n) ((n) << 24) > -#define CHNL_IMG_CTRL_FORMAT_MASK GENMASK(29, 24) Wouldn't it be simpler to extend this mask to 7 bits unconditionally ? If bit 30 isn't used on older platforms, clearing it shouldn't cause issues. > #define CHNL_IMG_CTRL_FORMAT_RGBA8888 0x00 > #define CHNL_IMG_CTRL_FORMAT_ABGR8888 0x01 > #define CHNL_IMG_CTRL_FORMAT_ARGB8888 0x02 -- Regards, Laurent Pinchart