From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E9CCDC982C4 for ; Wed, 16 Sep 2026 05:31:05 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:CC:To:In-Reply-To:References :Message-ID:Content-Transfer-Encoding:Content-Type:MIME-Version:Subject:Date: From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=jNQAJY0VrRNOcqodeuBlYf2NAb7EX7MKHfLgKkoDvxE=; b=C3jLoDx34NU0aoda90kstqcSW2 Htdk8+NJd+buPHJBhgOdzCA+AtYsU7u9ODlhaEW3ZY84T3z7iXM/r7oeCk8AV90uZwY1mg/IXvi2r LU3etjTgQZP7WxOylnNS3ucO9eBus8PwpCWMA1LnPMWnc1MoJSB1tQ48WJ0ORZ8vhi+LWICu4YQvJ lcXq8h62ns1fMSdW3h6N/QrNEmE5afXqVwxjsYZvd38uSiQMVGmUTmdSLaJ7OCBoV7hhWhTLgCG4Q joRAXtWnjIq8kcVZ0nQFMTFx8SyY2mPCE3vDV8dEm9TALz0mpwxCmU6CtG/u+4+dfi9QUO+lxy/vs 4/cpgyBA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.99.1 #2 (Red Hat Linux)) id 1x6iEU-00000008O7s-2feB; Wed, 16 Sep 2026 05:30:58 +0000 Received: from mail.aspeedtech.com ([211.20.114.72] helo=twmbx01.aspeedtech.com) by bombadil.infradead.org with esmtps (Exim 4.99.1 #2 (Red Hat Linux)) id 1x6iEJ-00000008O3Q-0Bd0 for linux-arm-kernel@lists.infradead.org; Wed, 16 Sep 2026 05:30:50 +0000 Received: from TWMBX01.aspeed.com (192.168.0.62) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1748.10; Wed, 16 Sep 2026 13:30:39 +0800 Received: from [127.0.1.1] (192.168.10.13) by TWMBX01.aspeed.com (192.168.0.62) with Microsoft SMTP Server id 15.2.1748.10 via Frontend Transport; Wed, 16 Sep 2026 13:30:39 +0800 From: Ryan Chen Date: Wed, 16 Sep 2026 13:30:38 +0800 Subject: [PATCH v3 1/9] dt-bindings: edac: aspeed: Add AST2700 SDRAM EDAC MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-ID: <20260916-edac-v3-1-23e9ed2fbdf9@aspeedtech.com> References: <20260916-edac-v3-0-23e9ed2fbdf9@aspeedtech.com> In-Reply-To: <20260916-edac-v3-0-23e9ed2fbdf9@aspeedtech.com> To: Stefan Schaeckeler , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Joel Stanley , Andrew Jeffery , Borislav Petkov , Tony Luck CC: , , , , , Borislav Petkov , Ryan Chen , Krzysztof Kozlowski X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1789536639; l=1457; i=ryan_chen@aspeedtech.com; s=20251126; h=from:subject:message-id; bh=/rj5B9ojWffAdYkp2s4TIp84wfNqe/zSqKMEbEuHOX4=; b=GYkP/XZWtwiUUJWsJIWzmy8RkaKbHmY9uylzU6cltcIxAENQV5d84N21V4EbKHLNnveLuQxnp JAis4C6OwSAAyrM6rN+wWlRAxdB+67ehvhBV+Ut3MA6dpFsW7x33/pP X-Developer-Key: i=ryan_chen@aspeedtech.com; a=ed25519; pk=Xe73xY6tcnkuRjjbVAB/oU30KdB3FvG4nuJuILj7ZVc= X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260915_223047_139390_338E3D6D X-CRM114-Status: UNSURE ( 9.23 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add the "aspeed,ast2700-sdram-edac" compatible and note DDR5 support. Signed-off-by: Ryan Chen Acked-by: Krzysztof Kozlowski --- .../devicetree/bindings/edac/aspeed,ast2400-sdram-edac.yaml | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/edac/aspeed,ast2400-sdram-edac.yaml b/Documentation/devicetree/bindings/edac/aspeed,ast2400-sdram-edac.yaml index 09735826d707..685b6815f293 100644 --- a/Documentation/devicetree/bindings/edac/aspeed,ast2400-sdram-edac.yaml +++ b/Documentation/devicetree/bindings/edac/aspeed,ast2400-sdram-edac.yaml @@ -10,8 +10,9 @@ maintainers: - Stefan Schaeckeler description: > - The Aspeed BMC SoC supports DDR3 and DDR4 memory with and without ECC (error - correction check). + The Aspeed BMC SoCs support DDR memory with and without ECC (error + correction check): DDR3 and DDR4 on the AST2400, AST2500 and AST2600, + and DDR4 and DDR5 on the AST2700. The memory controller supports SECDED (single bit error correction, double bit error detection) and single bit error auto scrubbing by reserving 8 bits for @@ -25,6 +26,7 @@ properties: - aspeed,ast2400-sdram-edac - aspeed,ast2500-sdram-edac - aspeed,ast2600-sdram-edac + - aspeed,ast2700-sdram-edac reg: maxItems: 1 -- 2.34.1