[PATCH net-next 3/4] dt-bindings: net: allwinner,sun8i-a83t-emac: Add Allwinner H616 EMAC1 and syscon index

[Alastair D'Silva <alastair@d-silva.org>]

Document the Allwinner H616 EMAC1 and internal EMAC compatible strings
("allwinner,sun50i-h616-emac1" and "allwinner,sun50i-h616-internal-emac").
Update the syscon property schema to support an optional register index
offset argument, allowing boards to reference the secondary EMAC clock
register on H616/H618 SoCs.

Assisted-by: LLM
Signed-off-by: Alastair D'Silva <alastair@d-silva.org>
---

Notes:
    Tested against Allwinner H616/H618 device trees in Armbian, verifying
    schema validation with dt_binding_check.

 .../bindings/net/allwinner,sun8i-a83t-emac.yaml    | 14 +++++++++++---
 1 file changed, 11 insertions(+), 3 deletions(-)

diff --git a/Documentation/devicetree/bindings/net/allwinner,sun8i-a83t-emac.yaml b/Documentation/devicetree/bindings/net/allwinner,sun8i-a83t-emac.yaml
index 323a669fa982..cd1075dab581 100644
--- a/Documentation/devicetree/bindings/net/allwinner,sun8i-a83t-emac.yaml
+++ b/Documentation/devicetree/bindings/net/allwinner,sun8i-a83t-emac.yaml
@@ -39,6 +39,8 @@ properties:
               - allwinner,sun50i-a100-emac
               - allwinner,sun50i-h6-emac
               - allwinner,sun50i-h616-emac0
+              - allwinner,sun50i-h616-emac1
+              - allwinner,sun50i-h616-internal-emac
               - allwinner,sun55i-a523-gmac0
           - const: allwinner,sun50i-a64-emac
       - items:
@@ -71,10 +73,16 @@ properties:
     maxItems: 1
 
   syscon:
-    $ref: /schemas/types.yaml#/definitions/phandle
+    $ref: /schemas/types.yaml#/definitions/phandle-array
+    items:
+      - minItems: 1
+        maxItems: 2
+        items:
+          - description: Phandle to the device containing the EMAC or GMAC clock register
+          - description: Register index offset (0 for EMAC0, 1 for EMAC1)
     description:
-      Phandle to the device containing the EMAC or GMAC clock
-      register
+      Phandle to the device containing the EMAC or GMAC clock register,
+      with an optional register index (0 for EMAC0, 1 for EMAC1).
 
 required:
   - compatible
-- 
2.53.0