From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 46372C982DA for ; Mon, 21 Sep 2026 02:21:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=DiEoWNyl/HmsFxa/QeSKicd4+2TIsyG8qOT3JDqK1NU=; b=OmswbDtWQ6QgHtQfz3lgm07ScJ v2eODa8mfJTf6/+GEq+atIBBY59nsUKHYuXAoyi3laCPUxO1zNCZE+0zXvbxpRLDcgfaIk0hzypI2 13pCoRAATfJn2VbBe293dO0KnnBiQ4pI7Uj5Mr3HSdk1xA/LwdEPri0wDjxH2frUC+YQ8RjgHdE2I RbJvHyeUExDMmTq9CaYcnx7GUzfZLy75O6ljhAlmehoYXVsz4nE939KR0JwoiV+hIw8ySyA4F93jS LMw+nSJIY4q8/4VK581iQAFhbc2uCHYg/KNsjVcSaNeqWOSsJ1Rxg+6gm1zIAim/OUleSYaa9/my1 MnWCDKlw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.99.1 #2 (Red Hat Linux)) id 1x8Tet-00000000iVE-0bXd; Mon, 21 Sep 2026 02:21:31 +0000 Received: from zg8tmtyylji0my4xnjqumte4.icoremail.net ([162.243.164.118]) by bombadil.infradead.org with esmtp (Exim 4.99.1 #2 (Red Hat Linux)) id 1x8Tep-00000000iUd-3Otp for linux-arm-kernel@lists.infradead.org; Mon, 21 Sep 2026 02:21:30 +0000 Received: from prodtpl.icoremail.net (unknown [10.12.1.20]) by hzbj-icmmx-6 (Coremail) with UTF8SMTP id AQAAfwBXdd6clLBqtHcQAA--.7307S2; Mon, 21 Sep 2026 10:21:16 +0800 (CST) Received: from WIN-B62RPRBL2BM.localdomain (unknown [218.76.62.144]) by mail (Coremail) with SMTP id AQAAf8DwBXSYlLBqHvDYAA--.41704S3; Mon, 21 Sep 2026 10:21:12 +0800 (CST) From: Zhu Ling To: maz@kernel.org, tglx@kernel.org Cc: radu@rendec.net, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Zhu Ling Subject: [PATCH v2] irqchip/gic: Fix UBSAN shift-out-of-bounds in GIC helpers Date: Mon, 21 Sep 2026 10:21:00 +0800 Message-ID: <20260921022101.20941-1-zhuling2709@phytium.com.cn> X-Mailer: git-send-email 2.43.0 In-Reply-To: <86ldjlp0qi.wl-maz@kernel.org> References: <86ldjlp0qi.wl-maz@kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-CM-TRANSID: AQAAf8DwBXSYlLBqHvDYAA--.41704S3 X-CM-SenderInfo: x2kxzxlqjsliuz6sx5pwlxzhxfrphubq/1tbiAQAFAWqwNEoBEwAAsz Authentication-Results: hzbj-icmmx-6; spf=neutral smtp.mail=zhuling270 9@phytium.com.cn; X-Coremail-Antispam: 1Uk129KBjvJXoW7AF48Zr4kJrWUAF4DuF4kZwb_yoW5JryUpF W5J34Iyr4Iy3Wa9a1DAF1UZry5Jwn3KrW2krW7Gasrury5Gas8Aa1ay3sxX3W7XrZrAa4U C3ZaqF18u3WUAFDanT9S1TB71UUUUU7qnTZGkaVYY2UrUUUUj1kv1TuYvTs0mT0YCTnIWj DUYxn0WfASr-VFAU7a7-sFnT9fnUUIcSsGvfJ3UbIYCTnIWIevJa73UjIFyTuYvj4RJUUU UUUUU X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260920_192127_980362_ED1EC219 X-CRM114-Status: GOOD ( 12.69 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org When running with UBSAN enabled, enabling a GPIO controller that uses a GIC interrupt as its parent triggers several shift-out-of-bounds warnings: shift-out-of-bounds in drivers/irqchip/irq-gic-common.c:50:21 left shift of 2 by 30 places cannot be represented in type 'int' Similar reports are emitted from gic_poke_irq() and gic_peek_irq() in drivers/irqchip/irq-gic-v3.c. These masks are generated by shifting signed integer constants, which invokes undefined behavior when bit 31 is selected. Use BIT() to generate the masks with an unsigned type and make their intent explicit. Signed-off-by: Zhu Ling --- Changes in v2: - Use BIT() instead of explicit unsigned shifts, as suggested by Marc. - Drop the redundant introductory text from the email. - Update the author email address. Link: https://lore.kernel.org/r/2fJDwUUYdEf2_eaRa041L9xkT8RkSWFeo7euOnqMbbPhUatLlEaAvGfB6sOspDmXaxO87Eh7bQLV9UolyjbMtZBT1wB2UGypjPOo0Z-RC0Q=@proton.me --- drivers/irqchip/irq-gic-common.c | 2 +- drivers/irqchip/irq-gic-v3.c | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/irqchip/irq-gic-common.c b/drivers/irqchip/irq-gic-common.c index c776f9142610..8bd1eaa54295 100644 --- a/drivers/irqchip/irq-gic-common.c +++ b/drivers/irqchip/irq-gic-common.c @@ -48,7 +48,7 @@ void gic_enable_quirks(u32 iidr, const struct gic_quirk *quirks, int gic_configure_irq(unsigned int irq, unsigned int type, void __iomem *base) { - u32 confmask = 0x2 << ((irq % 16) * 2); + u32 confmask = BIT(((irq % 16) * 2) + 1); u32 confoff = (irq / 16) * 4; u32 val, oldval; int ret = 0; diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c index 6e1fa5b247fc..15110d47ddb0 100644 --- a/drivers/irqchip/irq-gic-v3.c +++ b/drivers/irqchip/irq-gic-v3.c @@ -457,7 +457,7 @@ static int gic_peek_irq(struct irq_data *d, u32 offset) u32 index, mask; offset = convert_offset_index(d, offset, &index); - mask = 1 << (index % 32); + mask = BIT(index % 32); if (gic_irq_in_rdist(d)) base = gic_data_rdist_sgi_base(); @@ -473,7 +473,7 @@ static void gic_poke_irq(struct irq_data *d, u32 offset) u32 index, mask; offset = convert_offset_index(d, offset, &index); - mask = 1 << (index % 32); + mask = BIT(index % 32); if (gic_irq_in_rdist(d)) base = gic_data_rdist_sgi_base(); -- 2.43.0