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x86_64-w64-mingw32) MIME-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: quoted-printable X-Authority-Analysis: v=2.4 cv=B8ssQ+tM c=1 sm=1 tr=0 ts=6ab1a1a4 cx=c_pps a=JL+w9abYAAE89/QcEU+0QA==:117 a=aNnz9XPx1a4JIXSYt2cE/A==:17 a=8nJEP1OIZ-IA:10 a=VdqzKS8jKosA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=ZpdpYltYx_vBUK5n70dp:22 a=7CQSdrXTAAAA:8 a=ZpRu-6ZVBUCh-PS3OmgA:9 a=wPNLvfGTeEIA:10 a=324X-CrmTo6CU4MGRt3R:22 a=a-qgeE7W1pNrGK8U0ZQC:22 X-Proofpoint-ORIG-GUID: unnY3NAISQNxfaAV8drMn9wnk8Ycq_Cl X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTIxMDMxMyBTYWx0ZWRfX4NfxRrlo8D8f 7dBSUURBPtN6C0ANrK7n1KAhJiZ+8B3a6r2+BLsRdkdwsQ2W/wDOO07RHpglnksV0DNsAVZq1Kz SAudT3mj/sKySDBIzvEoT2urzOE/HGuM+tAJLXGhcMypSArLWDMOH6VR0Mekf7rn5eLPHS2vKG2 CtSHytSU4bx8VX2g7aV9uZuZNjBEKbxIng7mdEKZZrp/Y4/vSo7CkQz54iOo4W1HgVQU/s/fHrd h5QE4YujQSmh3qp+t1MrVOJ9X9XOk7xZOktqyKw4Q7NU0LeC4z6gZl52kSBHMjtH2MWU0rkw46y ByUetJVmanBP1zDjMH4HNH2bjun6uR4Y6fJDqEX5dwA7txqSjW2jHOyJrw92QhdXs8SreD1A0OH Xrx3VDtA1UOyQ3KrmjifXCC6WXAdjUohoQkeze05j9Pey58ifGl+QdOsNGJiGCa8dMRhQVR6gyS xe9QOm87dme5La72hDg== X-Proofpoint-GUID: unnY3NAISQNxfaAV8drMn9wnk8Ycq_Cl X-Proofpoint-Spam-Info: AW1haW4tMjYwOTIxMDMxMyBTYWx0ZWRfXyyBsEQ08IKlW T12UL9nXFhnzdUn5Rco33cyZmgxM6a2YfOc9k0jldK2jKZ9l/ugIh59DrK7vdTcR/vrzdENuWlk Bd7JfEcirNBFLTXD1Rp0uEQFV4TMdUQ= X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-21_06,2026-09-21_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 adultscore=0 suspectscore=0 spamscore=0 phishscore=0 impostorscore=0 priorityscore=1501 bulkscore=0 lowpriorityscore=0 malwarescore=0 clxscore=1015 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2609040000 definitions=main-2609210313 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260921_142909_743331_D9C781DA X-CRM114-Status: GOOD ( 25.65 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Mon, 21 Sep 2026 11:14:22 +0100 Suzuki K Poulose wrote: > On 21/09/2026 10:27, Suzuki K Poulose wrote: > > On 19/09/2026 02:27, Jonathan Cameron wrote: =20 > >>> The RMM (Realm Management Monitor) provides functionality that can be > >>> accessed by SMC calls from the host. > >>> > >>> The SMC definitions are based on DEN0137[1] version 2.0-bet3 > >>> > >>> [1] https://developer.arm.com/documentation/den0137/2-0bet3/ > >>> > >>> Signed-off-by: Steven Price > >>> Signed-off-by: Suzuki K Poulose =20 > >> > >> With Gavin's nitpicks and the GENMASK_ULL() from sashiko, just a few > >> comments inline.=A0 Mostly on subtle inconsistencies that really don't > >> matter that much. > >> =20 > >>> =A0 include/linux/arm-smccc-rmi.h | 497 +++++++++++++++++++++++++++++= +++++ > >>> =A0 1 file changed, 497 insertions(+) > >>> =A0 create mode 100644 include/linux/arm-smccc-rmi.h > >>> > >>> diff --git a/include/linux/arm-smccc-rmi.h b/include/linux/arm-smccc-= =20 > >>> rmi.h > >>> new file mode 100644 > >>> index 000000000000..214d6228dfc2 > >>> --- /dev/null > >>> +++ b/include/linux/arm-smccc-rmi.h =20 >=20 > .. >=20 > >>> + > >>> +struct rec_exit { > >>> +=A0=A0=A0 union { /* 0x000 */ > >>> +=A0=A0=A0=A0=A0=A0=A0 u8 exit_reason; > >>> +=A0=A0=A0=A0=A0=A0=A0 u8 padding0[0x100]; =20 >=20 > ... >=20 > >> =20 > >>> +=A0=A0=A0 }; > >>> +=A0=A0=A0 union { /* 0x400 */ > >>> +=A0=A0=A0=A0=A0=A0=A0 struct { > >>> +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 u64 cntp_ctl; > >>> +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 u64 cntp_cval; > >>> +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 u64 cntv_ctl; > >>> +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 u64 cntv_cval; > >>> +=A0=A0=A0=A0=A0=A0=A0 }; > >>> +=A0=A0=A0=A0=A0=A0=A0 u8 padding4[0x100]; > >>> +=A0=A0=A0 }; > >>> +=A0=A0=A0 union { /* 0x500 */ > >>> +=A0=A0=A0=A0=A0=A0=A0 struct { > >>> +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 u64 ripas_base; > >>> +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 u64 ripas_top; > >>> +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 u8 ripas_value; > >>> +=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0=A0 u8 padding5[0xf]; =20 > >> > >> In various other places you just use a u64 for a u8 > >> + padding. Why is this one special? And for that matter > >> various other fields later in this particular structure? =20 > >=20 > > Please feel free to point out, if you spot any. I am happy > > to fix them. =20 >=20 > I took a look and the padding is for extra "u64" bits in there. > e.g, ripas_value offset =3D 0x510 and the s2ap_base is really at 0x520 > not 0x518. Same applies for the pmu_ovf_status and vsmmu. >=20 > So, I would leave them as they are. The rest are consistent. > e.g, num_bps and num_wps. in realm_parameter Ok. That's logical enough for me. When no padding happens to follow that goes beyond the u64 then use that for simplicity and if there is padding anyway use a u8[] that include the rest of the u64 and the next bit Thanks for talking me through it! Jonathan >=20 > Cheers > Suzuki >=20 >=20 > > =20