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The controller remains disabled by default and is enabled by board dts files as needed. Signed-off-by: Larisa Grigore --- arch/arm64/boot/dts/freescale/s32n79.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/s32n79.dtsi b/arch/arm64/boot/dts/freescale/s32n79.dtsi index 94ab58783fdc..9f64a7acc3f8 100644 --- a/arch/arm64/boot/dts/freescale/s32n79.dtsi +++ b/arch/arm64/boot/dts/freescale/s32n79.dtsi @@ -100,6 +100,16 @@ uart7: serial@4aa40000 { status = "disabled"; }; + ufshc: ufs@4ac80000 { + compatible = "nxp,s32n79-ufshc"; + reg = <0x4ac80000 0x1000>, <0x4ac40000 0x1000>; + reg-names = "ufshc", "scm"; + interrupt-parent = <&irqsteer_coss>; + interrupts = <211>; + clocks = <&clks 0x92>; + status = "disabled"; + }; + irqsteer_coss: interrupt-controller@4ed00000 { compatible = "nxp,s32n79-irqsteer"; reg = <0x4ed00000 0x10000>; -- 2.43.0