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Tue, 22 Sep 2026 03:53:31 -0700 (PDT) Received: from localhost.localdomain ([2409:8a1e:2e81:7320:e5f5:eb9b:fe8e:9197]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-87cd584f183sm2302b3a.41.2026.09.22.03.53.27 (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Tue, 22 Sep 2026 03:53:30 -0700 (PDT) From: Yuchao Zhang To: Marc Zyngier Cc: Oliver Upton , Fuad Tabba , James Morse , Suzuki K Poulose , Zenghui Yu , Catalin Marinas , Will Deacon , sashiko-reviews@lists.linux.dev, kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Yuchao Zhang Subject: Re: [PATCH] KVM: selftests: arm64: Add test for cross-vCPU LPI disable race Date: Tue, 22 Sep 2026 18:53:22 +0800 Message-ID: <20260922105322.40484-1-ndaugoing@gmail.com> X-Mailer: git-send-email 2.50.1 In-Reply-To: <20260922102959.41FFA1F000FF@smtp.kernel.org> References: <20260922102959.41FFA1F000FF@smtp.kernel.org> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260922_035332_417787_EBBBD638 X-CRM114-Status: GOOD ( 10.77 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Thanks for the Sashiko review. All three points are legitimate; v2 addresses them: 1. INVALL/SYNC on unmapped collection: Agreed - INVALL for collection 1 was a command error that stalls the virtual ITS queue. v2 only sends INVALL and SYNC for TARGET_VCPU_ID (the only mapped collection and the only vCPU receiving ITS commands); unmapped collections and untouched vCPUs are skipped. 2. configure_lpis() overflow via -e: Agreed. v2 bounds-checks the -e argument in main() (must fit in one 64K ITT page) and adds an explicit assertion in configure_lpis() that nr_lpis <= SZ_64K to guarantee the property table is never overrun. 3. Silently ignored KVM_SIGNAL_MSI failures: Agreed in spirit. Injection failures are expected during the brief window where the disable path has invalidated the ITS caches and the guest has not yet remapped them. v2 counts successful injections (checking KVM_SIGNAL_MSI return value > 0) and asserts at the end that at least one succeeded, so a permanently broken environment can no longer yield a false pass. Additionally, v2 re-establishes the ITS mappings after every EnableLPIs toggle. Without this, the disable path's cache invalidation kills all mappings after the first iteration and the MSI flood goes silent - now the overflow window exists on every iteration, matching the re-initialisation sequence a real guest performs on re-enable. Tested status is unchanged: no KVM-capable hardware available, so compile- and TCG-plumbing-tested only; no Tested-by. pw-bot: cr Thanks, Yuchao