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[199.106.103.254]) by smtp.gmail.com with ESMTPSA id 5a478bee46e88-33e95c7d003sm1032300eec.9.2026.09.22.15.12.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 22 Sep 2026 15:12:13 -0700 (PDT) Date: Tue, 22 Sep 2026 15:12:02 -0700 From: Jonathan Cameron To: Suzuki K Poulose Cc: kvm@vger.kernel.org, kvmarm@lists.linux.dev, maz@kernel.org, will@kernel.org, catalin.marinas@arm.com, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, steven.price@arm.com, aneesh.kumar@kernel.org, oupton@kernel.org, gshan@redhat.com, joey.gouly@arm.com, tabba@google.com, yuzenghui@huawei.com, linux-coco@lists.linux.dev, gankulkarni@os.amperecomputing.com, sdonthineni@nvidia.com, alpergun@google.com, fj0570is@fujitsu.com, WeiLin.Chang@arm.com, lpieralisi@kernel.org, enju.kohei@fujitsu.com Subject: Re: [PATCH v19 07/20] KVM: arm64: Add vcpu load/put call backs for flavors Message-ID: <20260922151202.0000549c@oss.qualcomm.com> In-Reply-To: <20260920212845.707-8-suzuki.poulose@arm.com> References: <20260920212845.707-1-suzuki.poulose@arm.com> <20260920212845.707-8-suzuki.poulose@arm.com> Organization: Qualcomm X-Mailer: Claws Mail 4.4.0 (GTK 3.24.51; x86_64-w64-mingw32) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwOTIyMDMwMSBTYWx0ZWRfX3o2OqiiMi/7g v5tR9kubZUyewlv4iJss+dX+6HiHw+ILgoHmnEjve+xgQ3K09KClBJBuJNabtKHbPaG/antk9Vi LIV5xJ+DwFIItd4WcvFgxfNz2MmeK9lHjXFm6SgLr/jPFnjhTQDoCMFPu32I4mMe0uifY/KIcDF OztsTIeMK/kjhOhupgNhaKxlJwpxD4LzIt1hAY81rTxR1T8lJhUDzrUzezUrM0W97EX3LzLRZ/i wWNLEs6PjZNkVSOLclCpmsL3aJqlQsoUgZHij5AMUy+r8O6oa78JPKN7h39OhAtxmx1LHZW+fzb csS6tfkYjDhFGmzZZe6HQuoQmDMQUuSWy2MBFy0Kkp8rlTztph999ZvlaKgdw3Jqcf4HFXusxZl yVNaaWsonFnDG0LrOAbcNeSOTrYV3v4mMVYUUFGQAI9nMyKnV/Nq8AHEkRhtRkwFQIvEm4020sJ uE2yEYz7sXQ38MBm9pA== X-Authority-Analysis: v=2.4 cv=feI4WEQF c=1 sm=1 tr=0 ts=6ab2fd3f cx=c_pps a=cFYjgdjTJScbgFmBucgdfQ==:117 a=JYp8KDb2vCoCEuGobkYCKw==:17 a=kj9zAlcOel0A:10 a=VdqzKS8jKosA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=yOCtJkima9RkubShWh1s:22 a=7CQSdrXTAAAA:8 a=VwQbUJbxAAAA:8 a=eF-YeP4ItYG6qj9G5aAA:9 a=CjuIK1q_8ugA:10 a=scEy_gLbYbu1JhEsrz4S:22 a=a-qgeE7W1pNrGK8U0ZQC:22 X-Proofpoint-GUID: 0kH1fZHW_X9zB1F-R9861b0e5hRzhlhJ X-Proofpoint-ORIG-GUID: 0kH1fZHW_X9zB1F-R9861b0e5hRzhlhJ X-Proofpoint-Spam-Info: AW1haW4tMjYwOTIyMDMwMSBTYWx0ZWRfX/mfAIGfdwkTB W5+HqVMkua21VzKgujDLEVKYFQ4qPJZZc+OzCJmu8jU/AvjLz/Co9iXf4uJpYgnp5FPVd56wWew 3klRMUXCedLZykMY5YGzParOYo2j0cw= X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1176,Hydra:6.1.134,FMLib:17.12.100.49 definitions=2026-09-22_03,2026-09-21_02,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 bulkscore=0 phishscore=0 spamscore=0 suspectscore=0 lowpriorityscore=0 clxscore=1015 impostorscore=0 malwarescore=0 priorityscore=1501 adultscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2609040000 definitions=main-2609220301 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260922_151216_811864_68F7AA0B X-CRM114-Status: GOOD ( 30.03 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Sun, 20 Sep 2026 22:28:32 +0100 Suzuki K Poulose wrote: > Add VM flavor specific handlers for VCPU load/put, in an effort to make it > easier to follow the code. pauth traps were removed from VMs running PKVM > as it is a no-op for them. > > Based on a patch by Marc Zyngier > > Suggested-by: Marc Zyngier > Signed-off-by: Suzuki K Poulose A couple of comments on this one. > --- > Changes since v17: > - Use macro to initialize the per-flavor ops > - Add a wrapper to initialise ops in the vcpu structure. > - Add BUILD_BUG_ON for the array size > - Remove irrelevant comment about the order of timer loading for !VHE > - Use the explicti kvm_call_hyp_nvhe for nVHE flavor > - Don't call nvhe_vcpu_put from pkvm_vcpu_put, open code them > - Drop cpu argument for vcpu_load() callback. We set the cpu > before the callbacks are invoked > diff --git a/arch/arm64/kvm/arm.c b/arch/arm64/kvm/arm.c > index c74706ed9a531..9b977dc734220 100644 > --- a/arch/arm64/kvm/arm.c > +++ b/arch/arm64/kvm/arm.c > +static void nvhe_vcpu_load(struct kvm_vcpu *vcpu) > +{ > + vcpu_prepare_mmu(vcpu); > + kvm_timer_vcpu_load(vcpu); > + kvm_vgic_load(vcpu); > + kvm_vcpu_load_debug(vcpu); > + kvm_vcpu_load_fgt(vcpu); > + kvm_arch_vcpu_load_fp(vcpu); > + kvm_vcpu_pmu_restore_guest(vcpu); > + > + vcpu_load_pvtime(vcpu); > + vcpu_set_wfx_traps(vcpu); > + vcpu_set_pauth_traps(vcpu); Now it isn't called from the pkvm path can you remove the defenses in there on !is_protected_kvm_enabled()? > +} > + > + > +static void pkvm_vcpu_put(struct kvm_vcpu *vcpu) > +{ > + kvm_call_hyp_nvhe(__vgic_v3_save_aprs, &vcpu->arch.vgic_cpu.vgic_v3); > + kvm_call_hyp_nvhe(__pkvm_vcpu_put); > + > + /* __pkvm_vcpu_put implies a sync of the state */ > + if (kvm_vm_is_unprotected_pkvm(vcpu->kvm)) > + vcpu_set_flag(vcpu, PKVM_HOST_STATE_DIRTY); > + > + kvm_vcpu_put_debug(vcpu); > + kvm_arch_vcpu_put_fp(vcpu); > + kvm_timer_vcpu_put(vcpu); > + kvm_vgic_put(vcpu); > + kvm_vcpu_pmu_restore_host(vcpu); May have been incorrect or pointless but wasn't kvm_arm_vmid_clear_active() previously called in this path? Would be nice to tweak that to be under an appropriate gate in a precursor patch with explanation of why. > +} > + > +void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu) > +{ > + vcpu->arch.vcpu_ops->vcpu_put(vcpu); > vcpu_clear_on_unsupported_cpu(vcpu); > vcpu->cpu = -1; > } > @@ -2136,6 +2187,37 @@ int kvm_arch_vm_ioctl(struct file *filp, unsigned int ioctl, unsigned long arg) > } > } > + > +#define KVM_VCPU_OPS(flavor, ops) \ > + [(flavor)] = (ops) > + > +static const struct kvm_vcpu_ops *arm64_vcpu_ops[] = { > + KVM_VCPU_OPS(VM_VHE, &vhe_vcpu_ops), > + KVM_VCPU_OPS(VM_NVHE, &nvhe_vcpu_ops), > + KVM_VCPU_OPS(VM_PKVM, &pkvm_vcpu_ops), > + KVM_VCPU_OPS(VM_PROTECTED_PKVM, &pkvm_vcpu_ops), I'd put these in same order as the enum. Given the construction doesn't really matter but just feels more natural when reading the code to check they are all there (obviously the BUILD_BUG below also does that). > +}; > + > +static void kvm_init_vcpu_ops(struct kvm_vcpu *vcpu) > +{ > + BUILD_BUG_ON(ARRAY_SIZE(arm64_vcpu_ops) != VM_FLAVOR_MAX); > + vcpu->arch.vcpu_ops = arm64_vcpu_ops[vcpu->kvm->arch.vm_flavor]; > +} > + > static unsigned long nvhe_percpu_size(void) > { > return (unsigned long)CHOOSE_NVHE_SYM(__per_cpu_end) -