From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 96B37C98314 for ; Thu, 24 Sep 2026 07:25:04 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Cc:To:In-Reply-To:References :Message-Id:Content-Transfer-Encoding:Content-Type:MIME-Version:Subject:Date: From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=ze9Ko6ezHXiC8UiK0ASu4OtVoBu6gvsUdGeY0jM8sIU=; b=hJt44lGO/9PX4gT/rk0e1e3dPZ QKnErU6w+exmNZnuPgc+SMpOcSZOF0IMihGcxoMmlKkFrZV6saoc52Y7Ig+qPlQDPJgb9Gbhj+sL7 EqzUbWhist9jF2lEq5pNtGgvGXJE92PXI8rMPvanQ7F5NGM54Zin46saIihi24ENWXjTUuiugO83l 8YvGNBIRvTZ+O4HZmcUGXc7ll5alXmzu4Ft/Ffu7uDUzM+a+1gt+2raD7e4wTXzAt2+RsLsCXxjCn Ow2WmOYocqxZ/Ze2HGPXqcGTjHy8E1ELwlLGnrU3ohcWqpQjFrQPR6zB5dwdeDnTiPSx7hI6Wg0p/ uLkAurOQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.99.1 #2 (Red Hat Linux)) id 1x9dpB-0000000AHO3-3nv6; Thu, 24 Sep 2026 07:24:57 +0000 Received: from bali.collaboradmins.com ([2a01:4f8:201:9162::2]) by bombadil.infradead.org with esmtps (Exim 4.99.1 #2 (Red Hat Linux)) id 1x9doa-0000000AGzr-3uSn; Thu, 24 Sep 2026 07:24:22 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1790234659; bh=Y/liZ6Nd49xG0Z70hXow1cO9D1/xUcVpQPjdNHMxRGI=; h=From:Date:Subject:References:In-Reply-To:To:Cc:From; b=KZMzaAr3OM/u9AaOR+Owqsi4v+jNGeH9WhXUqhADMJ0YbS4zNFxM1MI2SP/WQsEg4 cmZwYxMsRyDsQ/KZVzcNG3BqTCnM7bBhH2g8mbg/u9/3TEo0oXKpI9fgQ0vO6CQO0Q 8FIUCbJYIDiUQW/KkHNQkn+QFAkWfWy6OxMmXFH2yX5qUuKzz5SxLwJXCZjG7lV2fn GgMcdyk7v5C4u83Jtqn+b0s5E51sMlzdYjXnFUmvj2DncXVnOayinni6CGEsB/nTW6 hD0LWDApDiv+DrbwqXpRcSdAoz2oTt9uO2bdjAZ9wm3xIz/FVSyK6l+3WD7BI6tRUx B47jm0OcsbBuQ== Received: from yukiji.home (unknown [100.64.0.131]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange x25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: laeyraud) by bali.collaboradmins.com (Postfix) with ESMTPSA id 60E9817E12B9; Thu, 24 Sep 2026 09:24:18 +0200 (CEST) From: Louis-Alexis Eyraud Date: Thu, 24 Sep 2026 09:23:29 +0200 Subject: [PATCH net-next v2 6/7] net: stmmac: mediatek: add support for TX clock output enable feature MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260924-dwmac-mediatek-mt8189-v2-6-430bd74d5ef9@collabora.com> References: <20260924-dwmac-mediatek-mt8189-v2-0-430bd74d5ef9@collabora.com> In-Reply-To: <20260924-dwmac-mediatek-mt8189-v2-0-430bd74d5ef9@collabora.com> To: Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Richard Cochran , Matthias Brugger , AngeloGioacchino Del Regno , Biao Huang , Maxime Chevallier , Maxime Coquelin , Alexandre Torgue Cc: kernel@collabora.com, netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-stm32@st-md-mailman.stormreply.com, Louis-Alexis Eyraud X-Mailer: b4 0.14.3 X-Developer-Signature: v=1; a=ed25519-sha256; t=1790234653; l=1623; i=louisalexis.eyraud@collabora.com; s=20250113; h=from:subject:message-id; bh=Y/liZ6Nd49xG0Z70hXow1cO9D1/xUcVpQPjdNHMxRGI=; b=i7c2i/75Fv9QVQvvay9feNu2kMA1up3QEFsBKmL9t3UVWxV10uQRa9y95XntFEaUvvym/H3gK e+8au2p88VuA2betdGitOBTrbc7EJ9TRoSvmCQgbQHPUheRP1JJ6EeF X-Developer-Key: i=louisalexis.eyraud@collabora.com; a=ed25519; pk=CHFBDB2Kqh4EHc6JIqFn69GhxJJAzc0Zr4e8QxtumuM= X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260924_002421_254133_C98C927D X-CRM114-Status: GOOD ( 12.73 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The MT8189 SoC has in the Ethernet control 0 register from the peripheral configuration (pericfg) an additional bit to enable the TX clock signal output. In preparation of MT8189 SoC support, add its definition, use in the mt8195_set_interface callback, and a support flag in the platform data. Signed-off-by: Louis-Alexis Eyraud --- drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c b/drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c index 6123efbbaf02..36599dc33b14 100644 --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-mediatek.c @@ -36,6 +36,9 @@ #define ETH_FINE_DLY_GTXC BIT(1) #define ETH_FINE_DLY_RXC BIT(0) +/* Peri Configuration register for mt8189 */ +#define MT8189_CTRL0_TXC_OUT_OP_EN BIT(20) + /* Peri Configuration register for mt8195 */ #define MT8195_PERI_ETH_CTRL_OFFSET 0xFD0 @@ -109,6 +112,7 @@ struct mediatek_dwmac_variant { u16 rx_delay_stage_div; u16 tx_delay_stage_div; u8 dma_bit_mask; + bool mac_txclk_out_en; }; /* list of clocks required for mac */ @@ -302,6 +306,9 @@ static int mt8195_set_interface(struct mediatek_dwmac_plat_data *plat, /* MT8195 only support external PHY */ intf_val |= MT8195_EXT_PHY_MODE; + if (plat->variant->mac_txclk_out_en) + intf_val |= MT8189_CTRL0_TXC_OUT_OP_EN; + regmap_write(plat->peri_regmap, reg_offset + MT8195_PERI_ETH_CTRL0, intf_val); -- 2.55.0