From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E319DC98314 for ; Thu, 24 Sep 2026 13:05:20 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc:To:From: Reply-To:Content-Type:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=mrAkrRvuOws2ibgKbDuKqvjXA6f6vGtNEhGcmSvkmGM=; b=k2VUEHcVElvej5EwUjk/DnJtl5 lPVlvmsC4r9bbPsFHeoLYv6JXmXgrP0ynrsXqSffyne6UiPNwHBDozLan8ZCx902N3ocvB60qtj4K r+Gj75zK6eChT1VBZGqnO0R09Hb4h4vaLArJ9/bORVulSyJFu8HNmFmomF6vbAeRJBHBEpYDKPb9a k8Fg2dSQZk/LlJoinEygby8dULXYrtt0KGf7wmJpE4JsiMQIoqmODwKqmSIgnEinaAbH2ogRi/7/J HHNUFeIK8ty49p8xXAdeNw8RR/mtmJIBrkw0g20tVLOrM6362gEWiisuIJKgrZX3BlFOrGFsIKtmA WMgYH/Vg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.99.1 #2 (Red Hat Linux)) id 1x9j8L-0000000B2de-2UPO; Thu, 24 Sep 2026 13:05:05 +0000 Received: from bali.collaboradmins.com ([2a01:4f8:201:9162::2]) by bombadil.infradead.org with esmtps (Exim 4.99.1 #2 (Red Hat Linux)) id 1x9j8I-0000000B2cA-2y0A; Thu, 24 Sep 2026 13:05:04 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1790255100; bh=e07vGJYDWmQo+2xpujVitCrBoYhngsffPos8gfqif1c=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=CyDhrSr5dU0anRlNNJd5aobYwLomFZVSlIVcMwTFtVFWSW99ke7lFCxaVBfZTOZxo 0egITSz9xLB63v4YIoSSeMjcUqy+uPjRf9I53G6kv3XvsW+jh9uucz7dUcb8/NjHjj o7cF7iSNXg/dLIYvUxKnXY/6Kd3KM3+dKHVKP5/FXsHvQ0tc6ORMZjB1vZT4rm2Mny 9r3MAWsUVHE0UdpWT7padEzmQNXij4cK2yIVobvZarHVccDYzY0QQJaMBXz/prEGjQ bp53CWi++LbuKxSfsffGWMiQKqYmWfWew6bCmZBys19rdVY2znudsme6vjpidT3brf RWD7I1r/IX9Gg== Received: from benjamin-XPS-13-9310 (unknown [100.64.1.43]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange x25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: benjamin.gaignard) by bali.collaboradmins.com (Postfix) with ESMTPSA id 4E8BE17E089A; Thu, 24 Sep 2026 15:05:00 +0200 (CEST) From: Benjamin Gaignard To: nicolas.dufresne@collabora.com, benjamin.gaignard@collabora.com, p.zabel@pengutronix.de, mchehab@kernel.org, robh@kernel.org, krzk+dt@kernel.org, conor+dt@kernel.org, Frank.Li@nxp.com, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com Cc: linux-media@vger.kernel.org, linux-rockchip@lists.infradead.org, devicetree@vger.kernel.org, imx@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kernel@collabora.com Subject: [PATCH v3 1/3] media: verisilicon: Remove deprecated variant Date: Thu, 24 Sep 2026 15:04:51 +0200 Message-ID: <20260924130453.196299-2-benjamin.gaignard@collabora.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260924130453.196299-1-benjamin.gaignard@collabora.com> References: <20260924130453.196299-1-benjamin.gaignard@collabora.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260924_060502_893628_A01B7377 X-CRM114-Status: GOOD ( 16.39 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org "nxp,imx8mq-vpu" is tagged as deprecated since: commit f3116f2e52e6 ("media: dt-bindings: media: nxp, imx8mq-vpu: Split G1 and G2 nodes") merged since v5.17-rc1. There is more reference to it since that. Remove for driver to clean up the code. Signed-off-by: Benjamin Gaignard --- changes in v3: - remove more dead code changes in v2: - have a separate patch for documentation - rebased on v7.3-rc1 .../media/platform/verisilicon/hantro_drv.c | 10 -- .../media/platform/verisilicon/imx8m_vpu_hw.c | 105 ------------------ 2 files changed, 115 deletions(-) diff --git a/drivers/media/platform/verisilicon/hantro_drv.c b/drivers/media/platform/verisilicon/hantro_drv.c index ad71c0402ef3..12c804dcc669 100644 --- a/drivers/media/platform/verisilicon/hantro_drv.c +++ b/drivers/media/platform/verisilicon/hantro_drv.c @@ -725,7 +725,6 @@ static const struct of_device_id of_hantro_match[] = { #endif #ifdef CONFIG_VIDEO_HANTRO_IMX8M { .compatible = "nxp,imx8mm-vpu-g1", .data = &imx8mm_vpu_g1_variant, }, - { .compatible = "nxp,imx8mq-vpu", .data = &imx8mq_vpu_variant, }, { .compatible = "nxp,imx8mq-vpu-g1", .data = &imx8mq_vpu_g1_variant }, { .compatible = "nxp,imx8mq-vpu-g2", .data = &imx8mq_vpu_g2_variant }, #endif @@ -1100,15 +1099,6 @@ static int hantro_probe(struct platform_device *pdev) if (ret) return ret; - /* - * Support for nxp,imx8mq-vpu is kept for backwards compatibility - * but it's deprecated. Please update your DTS file to use - * nxp,imx8mq-vpu-g1 or nxp,imx8mq-vpu-g2 instead. - */ - if (of_device_is_compatible(pdev->dev.of_node, "nxp,imx8mq-vpu")) - dev_warn(&pdev->dev, "%s compatible is deprecated\n", - match->compatible); - INIT_DELAYED_WORK(&vpu->watchdog_work, hantro_watchdog); vpu->clocks = devm_kcalloc(&pdev->dev, vpu->variant->num_clocks, diff --git a/drivers/media/platform/verisilicon/imx8m_vpu_hw.c b/drivers/media/platform/verisilicon/imx8m_vpu_hw.c index fa4224de4b99..b091d807ae4e 100644 --- a/drivers/media/platform/verisilicon/imx8m_vpu_hw.c +++ b/drivers/media/platform/verisilicon/imx8m_vpu_hw.c @@ -25,55 +25,6 @@ #define CTRL_G1_PP_FUSE 0x0c #define CTRL_G2_DEC_FUSE 0x10 -static void imx8m_soft_reset(struct hantro_dev *vpu, u32 reset_bits) -{ - u32 val; - - /* Assert */ - val = readl(vpu->ctrl_base + CTRL_SOFT_RESET); - val &= ~reset_bits; - writel(val, vpu->ctrl_base + CTRL_SOFT_RESET); - - udelay(2); - - /* Release */ - val = readl(vpu->ctrl_base + CTRL_SOFT_RESET); - val |= reset_bits; - writel(val, vpu->ctrl_base + CTRL_SOFT_RESET); -} - -static void imx8m_clk_enable(struct hantro_dev *vpu, u32 clock_bits) -{ - u32 val; - - val = readl(vpu->ctrl_base + CTRL_CLOCK_ENABLE); - val |= clock_bits; - writel(val, vpu->ctrl_base + CTRL_CLOCK_ENABLE); -} - -static int imx8mq_runtime_resume(struct hantro_dev *vpu) -{ - int ret; - - ret = clk_bulk_prepare_enable(vpu->variant->num_clocks, vpu->clocks); - if (ret) { - dev_err(vpu->dev, "Failed to enable clocks\n"); - return ret; - } - - imx8m_soft_reset(vpu, RESET_G1 | RESET_G2); - imx8m_clk_enable(vpu, CLOCK_G1 | CLOCK_G2); - - /* Set values of the fuse registers */ - writel(0xffffffff, vpu->ctrl_base + CTRL_G1_DEC_FUSE); - writel(0xffffffff, vpu->ctrl_base + CTRL_G1_PP_FUSE); - writel(0xffffffff, vpu->ctrl_base + CTRL_G2_DEC_FUSE); - - clk_bulk_disable_unprepare(vpu->variant->num_clocks, vpu->clocks); - - return 0; -} - /* * Supported formats. */ @@ -234,45 +185,10 @@ static const struct hantro_fmt imx8m_vpu_g2_dec_fmts[] = { }, }; -static int imx8mq_vpu_hw_init(struct hantro_dev *vpu) -{ - vpu->ctrl_base = vpu->reg_bases[vpu->variant->num_regs - 1]; - - return 0; -} - -static void imx8m_vpu_g1_reset(struct hantro_ctx *ctx) -{ - struct hantro_dev *vpu = ctx->dev; - - imx8m_soft_reset(vpu, RESET_G1); -} - /* * Supported codec ops. */ -static const struct hantro_codec_ops imx8mq_vpu_codec_ops[] = { - [HANTRO_MODE_MPEG2_DEC] = { - .run = hantro_g1_mpeg2_dec_run, - .reset = imx8m_vpu_g1_reset, - .init = hantro_mpeg2_dec_init, - .exit = hantro_mpeg2_dec_exit, - }, - [HANTRO_MODE_VP8_DEC] = { - .run = hantro_g1_vp8_dec_run, - .reset = imx8m_vpu_g1_reset, - .init = hantro_vp8_dec_init, - .exit = hantro_vp8_dec_exit, - }, - [HANTRO_MODE_H264_DEC] = { - .run = hantro_g1_h264_dec_run, - .reset = imx8m_vpu_g1_reset, - .init = hantro_h264_dec_init, - .exit = hantro_h264_dec_exit, - }, -}; - static const struct hantro_codec_ops imx8mq_vpu_g1_codec_ops[] = { [HANTRO_MODE_MPEG2_DEC] = { .run = hantro_g1_mpeg2_dec_run, @@ -319,30 +235,9 @@ static const struct hantro_irq imx8mq_g2_irqs[] = { { "g2", hantro_g2_irq }, }; -static const char * const imx8mq_clk_names[] = { "g1", "g2", "bus" }; -static const char * const imx8mq_reg_names[] = { "g1", "g2", "ctrl" }; static const char * const imx8mq_g1_clk_names[] = { "g1" }; static const char * const imx8mq_g2_clk_names[] = { "g2" }; -const struct hantro_variant imx8mq_vpu_variant = { - .dec_fmts = imx8m_vpu_dec_fmts, - .num_dec_fmts = ARRAY_SIZE(imx8m_vpu_dec_fmts), - .postproc_fmts = imx8m_vpu_postproc_fmts, - .num_postproc_fmts = ARRAY_SIZE(imx8m_vpu_postproc_fmts), - .postproc_ops = &hantro_g1_postproc_ops, - .codec = HANTRO_MPEG2_DECODER | HANTRO_VP8_DECODER | - HANTRO_H264_DECODER, - .codec_ops = imx8mq_vpu_codec_ops, - .init = imx8mq_vpu_hw_init, - .runtime_resume = imx8mq_runtime_resume, - .irqs = imx8mq_irqs, - .num_irqs = ARRAY_SIZE(imx8mq_irqs), - .clk_names = imx8mq_clk_names, - .num_clocks = ARRAY_SIZE(imx8mq_clk_names), - .reg_names = imx8mq_reg_names, - .num_regs = ARRAY_SIZE(imx8mq_reg_names) -}; - static const struct of_device_id imx8mq_vpu_shared_resources[] = { { .compatible = "nxp,imx8mq-vpu-g1", }, { .compatible = "nxp,imx8mq-vpu-g2", }, -- 2.53.0