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[78.137.176.146]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-4887a746c57sm19764208f8f.35.2026.09.27.08.12.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 27 Sep 2026 08:12:08 -0700 (PDT) From: Pablo Mazzini To: Chen-Yu Tsai , Jernej Skrabec , Linus Walleij , Samuel Holland Cc: Pablo Mazzini , linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-sunxi@lists.linux.dev Subject: [PATCH v2 04/11] pinctrl: sunxi: add Allwinner B288 pin controller driver Date: Sun, 27 Sep 2026 16:10:09 +0100 Message-ID: <20260927151016.186493-5-pmazzini@gmail.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260927151016.186493-1-pmazzini@gmail.com> References: <20260927151016.186493-1-pmazzini@gmail.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260927_081211_476723_66C25F86 X-CRM114-Status: GOOD ( 19.65 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org 80 pins across ports B, C, D, F and G; the mux values come from the DT. Port C has no external interrupts. PH0 is BSP FPGA-only and omitted. Signed-off-by: Pablo Mazzini --- drivers/pinctrl/sunxi/Kconfig | 10 ++++ drivers/pinctrl/sunxi/Makefile | 1 + drivers/pinctrl/sunxi/pinctrl-sun8i-b288.c | 53 ++++++++++++++++++++++ 3 files changed, 64 insertions(+) create mode 100644 drivers/pinctrl/sunxi/pinctrl-sun8i-b288.c diff --git a/drivers/pinctrl/sunxi/Kconfig b/drivers/pinctrl/sunxi/Kconfig index dc62eba96348..a08186133090 100644 --- a/drivers/pinctrl/sunxi/Kconfig +++ b/drivers/pinctrl/sunxi/Kconfig @@ -56,6 +56,16 @@ config PINCTRL_SUN8I_A23_R default MACH_SUN8I select PINCTRL_SUNXI +config PINCTRL_SUN8I_B288 + bool "Support for the Allwinner B288 PIO" + default MACH_SUN8I + select PINCTRL_SUNXI + help + Say Y here to enable pin controller and GPIO support for the + Allwinner B288 (sun8iw10p1) SoC, as used in e-book readers such + as the PocketBook Verse. This covers ports B, C, D, F and G, + including the four banks of external interrupt capable pins. + config PINCTRL_SUN8I_H3 bool "Support for the Allwinner H3 PIO" default MACH_SUN8I diff --git a/drivers/pinctrl/sunxi/Makefile b/drivers/pinctrl/sunxi/Makefile index 951b3f1e4b4f..5129c0f19f3e 100644 --- a/drivers/pinctrl/sunxi/Makefile +++ b/drivers/pinctrl/sunxi/Makefile @@ -18,6 +18,7 @@ obj-$(CONFIG_PINCTRL_SUN50I_A100) += pinctrl-sun50i-a100.o obj-$(CONFIG_PINCTRL_SUN50I_A100_R) += pinctrl-sun50i-a100-r.o obj-$(CONFIG_PINCTRL_SUN8I_A83T) += pinctrl-sun8i-a83t.o obj-$(CONFIG_PINCTRL_SUN8I_A83T_R) += pinctrl-sun8i-a83t-r.o +obj-$(CONFIG_PINCTRL_SUN8I_B288) += pinctrl-sun8i-b288.o obj-$(CONFIG_PINCTRL_SUN8I_H3) += pinctrl-sun8i-h3.o obj-$(CONFIG_PINCTRL_SUN8I_H3_R) += pinctrl-sun8i-h3-r.o obj-$(CONFIG_PINCTRL_SUN8I_V3S) += pinctrl-sun8i-v3s.o diff --git a/drivers/pinctrl/sunxi/pinctrl-sun8i-b288.c b/drivers/pinctrl/sunxi/pinctrl-sun8i-b288.c new file mode 100644 index 000000000000..98dd4ead4c32 --- /dev/null +++ b/drivers/pinctrl/sunxi/pinctrl-sun8i-b288.c @@ -0,0 +1,53 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Allwinner B288 (sun8iw10p1) SoC pinctrl driver. + * + * Bank sizes and the interrupt mux derived from Allwinner's BSP driver + * pinctrl-sun8iw10p1.c, which is: + * Copyright (C) 2014 Jackie Hwang + */ + +#include +#include +#include +#include + +#include "pinctrl-sunxi.h" + +/* PH0 exists only on the BSP's FPGA platform and is omitted. */ +static const u8 b288_nr_bank_pins[SUNXI_PINCTRL_MAX_BANKS] = +/* PA PB PC PD PE PF PG */ + { 0, 17, 15, 29, 0, 7, 12 }; + +/* Port C has no external interrupts. */ +static const unsigned int b288_irq_bank_map[] = { 1, 3, 5, 6 }; + +static const u8 b288_irq_bank_muxes[SUNXI_PINCTRL_MAX_BANKS] = +/* PA PB PC PD PE PF PG */ + { 0, 6, 0, 6, 0, 6, 6 }; + +static struct sunxi_pinctrl_desc b288_pinctrl_data = { + .irq_banks = ARRAY_SIZE(b288_irq_bank_map), + .irq_bank_map = b288_irq_bank_map, +}; + +static int b288_pinctrl_probe(struct platform_device *pdev) +{ + return sunxi_pinctrl_dt_table_init(pdev, b288_nr_bank_pins, + b288_irq_bank_muxes, + &b288_pinctrl_data, 0); +} + +static const struct of_device_id b288_pinctrl_match[] = { + { .compatible = "allwinner,sun8i-b288-pinctrl", }, + {} +}; + +static struct platform_driver b288_pinctrl_driver = { + .probe = b288_pinctrl_probe, + .driver = { + .name = "sun8i-b288-pinctrl", + .of_match_table = b288_pinctrl_match, + }, +}; +builtin_platform_driver(b288_pinctrl_driver); -- 2.53.0