From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 72EE2CA5FAE for ; Tue, 29 Sep 2026 10:38:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type: Content-Transfer-Encoding:MIME-Version:References:In-Reply-To:Message-ID:Date :Subject:CC:To:From:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=CEDPGYC1RPsp34/2huo9oDvdsWGlpazljPcYpxq/p2I=; b=kHU1ttMPxF6UZtF5r17fSsV68Q UwVwhJhQ96W4y1MwyDBThXnXDnnL8qNsDmgK5Xss8yKCFmXfiEvfRRVU/fTBUU0Hdq2yWhwdpYruO 0+1fzrIU3ox6hzUluoJBXoMo4VWz4rlZymQac6/aECFtnkbD9zo5IV6Jh6DYWPgZ6iOVA/az7G/nv +rIDf1VaRLgKh1T6ZgY6KjadwzSd9HeEmCJHEUBMS7qJ1QgPpVkefATux8ZWW7fem+6xqCGCS5WEu uV4FNot7WSULS8c7PKlDoHKmpi2FiIIYN7jre/KyG5Pm2/FMkbfZfQjeSbYITBqT/uvsvsuNEeE89 yms48msQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.99.1 #2 (Red Hat Linux)) id 1xBVDk-00000003GzA-1tix; Tue, 29 Sep 2026 10:38:00 +0000 Received: from desiato.infradead.org ([2001:8b0:10b:1:d65d:64ff:fe57:4e05]) by bombadil.infradead.org with esmtps (Exim 4.99.1 #2 (Red Hat Linux)) id 1xBVDF-00000003GmO-2AZC for linux-arm-kernel@bombadil.infradead.org; Tue, 29 Sep 2026 10:37:29 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=infradead.org; s=desiato.20200630; h=Content-Type:Content-Transfer-Encoding :MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From: Sender:Reply-To:Content-ID:Content-Description; bh=CEDPGYC1RPsp34/2huo9oDvdsWGlpazljPcYpxq/p2I=; b=CVq4iVEz/7W4DDsppAGFXpislY eZBGzjFDVRPTCn6uJMFdUH+5jHUa/kV+O8ycwgPstvIhW5nDDjLxXypow4IMrgQ2fCVqTIo3enGVz zMvaW5qr0lK9ut90dHk4L2Y9tlEMLy6zNbBmML+jGfQzZLQ5CVqd1Zv34tHcuPe+kG4pmkBx3NbrT d8wpvJ2GtUuroEVZh2voJAqa/oJmETfGZyS0DNnXsIu7M/vCXLCv7TL2eI/k5BzEBDUn1QmjinY2J ijeK2bUWvBsjMTfv14WA+9fI3mtit/9KK+AAvCt0Swkkgv+EzXzwnxhIDBjq4gDtp3L/4UksSx3rV BUGtbUGg==; Received: from canpmsgout02.his.huawei.com ([113.46.200.217]) by desiato.infradead.org with esmtps (Exim 4.99.2 #2 (Red Hat Linux)) id 1xBVCy-00000002VF2-47VK for linux-arm-kernel@lists.infradead.org; Tue, 29 Sep 2026 10:37:17 +0000 dkim-signature: v=1; a=rsa-sha256; d=huawei.com; s=dkim; c=relaxed/relaxed; q=dns/txt; h=From; bh=CEDPGYC1RPsp34/2huo9oDvdsWGlpazljPcYpxq/p2I=; b=hgUnkkiogWWkH7pZKOinYR2DNSU52mvRAVR3j5GBOkMDrN1DJWXryE1cs8DYdMeia8UT3Mlcb wjddmZZtAjxjvHIo5Z9Ig+uPXpOh9UsIWklvh4BRmahW52P1uOllLrraCEKesBNfyi7j6SqNB3v z/H1Cn3Y7DBA4tLgh+eHxqA= Received: from mail.maildlp.com (unknown [172.19.162.197]) by canpmsgout02.his.huawei.com (SkyGuard) with ESMTPS id 4hvDpB0ZV4zcb44; Tue, 29 Sep 2026 18:25:22 +0800 (CST) Received: from kwepemr100010.china.huawei.com (unknown [7.202.195.125]) by mail.maildlp.com (Postfix) with ESMTPS id 626594057D; Tue, 29 Sep 2026 18:36:57 +0800 (CST) Received: from huawei.com (10.50.163.32) by kwepemr100010.china.huawei.com (7.202.195.125) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.45; Tue, 29 Sep 2026 18:36:56 +0800 From: Tian Zheng To: , , , , , , , CC: , , , , , , , , , , , , , , , , , , , , , , Subject: [PATCH v5 01/15] KVM: arm64: pgtables: Change write bit from S2AP_W to DBM Date: Tue, 29 Sep 2026 18:36:41 +0800 Message-ID: <20260929103655.85107-2-zhengtian10@huawei.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20260929103655.85107-1-zhengtian10@huawei.com> References: <20260929103655.85107-1-zhengtian10@huawei.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Originating-IP: [10.50.163.32] X-ClientProxiedBy: kwepems500002.china.huawei.com (7.221.188.17) To kwepemr100010.china.huawei.com (7.202.195.125) X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260929_113714_088225_69E9A355 X-CRM114-Status: GOOD ( 17.93 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Leonardo Bras As a first step of changing the encoding for the Stage2 PTE descriptor, introduce the DBM bit, and adapt every usage of writable to use the DBM bit (51) instead of S2AP[1]/Dirty bit (7). With DBM as the write permission bit and S2AP[1] as the dirty state, the encoding follows the FEAT_S2PIE principle of managing permissions and dirty state independently. For this step, we convert usages of RW(Dirty) -> WD(DBM|Dirty): every writable mapping sets both bits, read-only mappings clear both, and no behaviour changes. Link: https://lore.kernel.org/all/20260901171558.2674031-2-leo.bras@arm.com/ Signed-off-by: Leonardo Bras [zhengtian: keep the nested walker reading writability from S2AP[1] alone, document why, and reword the commit message] Signed-off-by: Tian Zheng --- arch/arm64/include/asm/kvm_pgtable.h | 3 +++ arch/arm64/kvm/hyp/pgtable.c | 7 ++++--- arch/arm64/kvm/nested.c | 5 +++++ arch/arm64/kvm/ptdump.c | 4 ++-- 4 files changed, 14 insertions(+), 5 deletions(-) diff --git a/arch/arm64/include/asm/kvm_pgtable.h b/arch/arm64/include/asm/kvm_pgtable.h index 41a8687938eb..37baa86d6fd8 100644 --- a/arch/arm64/include/asm/kvm_pgtable.h +++ b/arch/arm64/include/asm/kvm_pgtable.h @@ -93,10 +93,13 @@ typedef u64 kvm_pte_t; #define KVM_PTE_LEAF_ATTR_HI_S2_XN GENMASK(54, 53) +#define KVM_PTE_LEAF_ATTR_HI_S2_DBM BIT(51) + #define KVM_PTE_LEAF_ATTR_HI_S1_GP BIT(50) #define KVM_PTE_LEAF_ATTR_S2_PERMS (KVM_PTE_LEAF_ATTR_LO_S2_S2AP_R | \ KVM_PTE_LEAF_ATTR_LO_S2_S2AP_W | \ + KVM_PTE_LEAF_ATTR_HI_S2_DBM | \ KVM_PTE_LEAF_ATTR_HI_S2_XN) /* pKVM invalid pte encodings */ diff --git a/arch/arm64/kvm/hyp/pgtable.c b/arch/arm64/kvm/hyp/pgtable.c index b74dd5ce1efd..50f4d3a74f77 100644 --- a/arch/arm64/kvm/hyp/pgtable.c +++ b/arch/arm64/kvm/hyp/pgtable.c @@ -732,7 +732,7 @@ static int stage2_set_prot_attr(struct kvm_pgtable *pgt, enum kvm_pgtable_prot p attr |= KVM_PTE_LEAF_ATTR_LO_S2_S2AP_R; if (prot & KVM_PGTABLE_PROT_W) - attr |= KVM_PTE_LEAF_ATTR_LO_S2_S2AP_W; + attr |= KVM_PTE_LEAF_ATTR_HI_S2_DBM | KVM_PTE_LEAF_ATTR_LO_S2_S2AP_W; if (!kvm_lpa2_is_enabled()) attr |= FIELD_PREP(KVM_PTE_LEAF_ATTR_LO_S2_SH, sh); @@ -753,7 +753,7 @@ enum kvm_pgtable_prot kvm_pgtable_stage2_pte_prot(kvm_pte_t pte) if (pte & KVM_PTE_LEAF_ATTR_LO_S2_S2AP_R) prot |= KVM_PGTABLE_PROT_R; - if (pte & KVM_PTE_LEAF_ATTR_LO_S2_S2AP_W) + if (pte & KVM_PTE_LEAF_ATTR_HI_S2_DBM) prot |= KVM_PGTABLE_PROT_W; switch (FIELD_GET(KVM_PTE_LEAF_ATTR_HI_S2_XN, pte)) { @@ -1288,6 +1288,7 @@ static int stage2_update_leaf_attrs(struct kvm_pgtable *pgt, u64 addr, int kvm_pgtable_stage2_wrprotect(struct kvm_pgtable *pgt, u64 addr, u64 size) { return stage2_update_leaf_attrs(pgt, addr, size, 0, + KVM_PTE_LEAF_ATTR_HI_S2_DBM | KVM_PTE_LEAF_ATTR_LO_S2_S2AP_W, NULL, NULL, KVM_PGTABLE_WALK_IGNORE_EAGAIN); @@ -1368,7 +1369,7 @@ int kvm_pgtable_stage2_relax_perms(struct kvm_pgtable *pgt, u64 addr, set |= KVM_PTE_LEAF_ATTR_LO_S2_S2AP_R; if (prot & KVM_PGTABLE_PROT_W) - set |= KVM_PTE_LEAF_ATTR_LO_S2_S2AP_W; + set |= KVM_PTE_LEAF_ATTR_HI_S2_DBM | KVM_PTE_LEAF_ATTR_LO_S2_S2AP_W; if (prot & KVM_PGTABLE_PROT_X) { ret = stage2_set_xn_attr(prot, &xn); diff --git a/arch/arm64/kvm/nested.c b/arch/arm64/kvm/nested.c index b191365d97cc..4d7f52f4bc09 100644 --- a/arch/arm64/kvm/nested.c +++ b/arch/arm64/kvm/nested.c @@ -388,6 +388,11 @@ static int walk_nested_s2_pgd(struct kvm_vcpu *vcpu, phys_addr_t ipa, (ipa & GENMASK_ULL(addr_bottom - 1, 0)); out->output = paddr; out->block_size = 1UL << ((3 - level) * stride + wi->pgshift); + /* + * L1 descriptors keep the legacy encoding: S2AP[1] is the write + * permission, and DBM is RES0 (the L1-visible HAFDBS is limited + * to AF-only). + */ out->readable = desc & KVM_PTE_LEAF_ATTR_LO_S2_S2AP_R; out->writable = desc & KVM_PTE_LEAF_ATTR_LO_S2_S2AP_W; out->level = level; diff --git a/arch/arm64/kvm/ptdump.c b/arch/arm64/kvm/ptdump.c index 69899797dbad..b0cb8d84a9e9 100644 --- a/arch/arm64/kvm/ptdump.c +++ b/arch/arm64/kvm/ptdump.c @@ -40,8 +40,8 @@ static const struct ptdump_prot_bits stage2_pte_bits[] = { .clear = " ", }, { - .mask = KVM_PTE_LEAF_ATTR_LO_S2_S2AP_W, - .val = KVM_PTE_LEAF_ATTR_LO_S2_S2AP_W, + .mask = KVM_PTE_LEAF_ATTR_HI_S2_DBM, + .val = KVM_PTE_LEAF_ATTR_HI_S2_DBM, .set = "W", .clear = " ", }, -- 2.43.0