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Clean these up to resolve static warnings. Signed-off-by: Beleswar Padhi --- v2: Changelog: 1. None to this patch. Link to v1: https://lore.kernel.org/all/20260929201746.4078803-14-b-padhi@ti.com/ include/linux/soc/ti/ti_sci_protocol.h | 374 ++++++++++++++++++++++++- 1 file changed, 363 insertions(+), 11 deletions(-) diff --git a/include/linux/soc/ti/ti_sci_protocol.h b/include/linux/soc/ti/ti_sci_protocol.h index fd104b6668364..471f5580787cf 100644 --- a/include/linux/soc/ti/ti_sci_protocol.h +++ b/include/linux/soc/ti/ti_sci_protocol.h @@ -42,9 +42,17 @@ struct ti_sci_core_ops { * @get_device: Command to request for device managed by TISCI * Returns 0 for successful exclusive request, else returns * corresponding error message. + * @get_device_exclusive: Command to request for device managed by TISCI that is + * exclusively owned by the requesting host. + * Returns 0 for successful exclusive request, else returns + * corresponding error message. * @idle_device: Command to idle a device managed by TISCI * Returns 0 for successful exclusive request, else returns * corresponding error message. + * @idle_device_exclusive: Command to idle a device managed by TISCI that is + * exclusively owned by requesting host. + * Returns 0 for successful exclusive request, else returns + * corresponding error message. * @put_device: Command to release a device managed by TISCI * Returns 0 for successful release, else returns corresponding * error message. @@ -243,7 +251,7 @@ struct ti_sci_resource_desc { /** * struct ti_sci_rm_core_ops - Resource management core operations * @get_range: Get a range of resources belonging to ti sci host. - * @get_rage_from_shost: Get a range of resources belonging to + * @get_range_from_shost: Get a range of resources belonging to * specified host id. * - s_host: Host processing entity to which the * resources are allocated @@ -322,6 +330,35 @@ struct ti_sci_rm_irq_ops { * * Parameters for Navigator Subsystem ring configuration * See @ti_sci_msg_rm_ring_cfg_req + * + * @valid_params: Bitfield defining validity of ring configuration parameters. + * The ring configuration fields are not valid, and will not be used for + * ring configuration, if their corresponding valid bit is zero. + * Valid bit usage: + * 0 - Valid bit for @addr_lo + * 1 - Valid bit for @addr_hi + * 2 - Valid bit for @count + * 3 - Valid bit for @mode + * 4 - Valid bit for @size + * 5 - Valid bit for @order_id + * 6 - Valid bit for @virtid + * 7 - Valid bit for @asel + * @nav_id: Device ID of Navigator Subsystem from which the ring is allocated + * @index: ring index to be configured. + * @addr_lo: 32 LSBs of ring base address to be programmed into the ring's + * RING_BA_LO register + * @addr_hi: 16 MSBs of ring base address to be programmed into the ring's + * RING_BA_HI register. + * @count: Number of ring elements. Must be even if mode is CREDENTIALS or QM + * modes. + * @mode: Specifies the mode the ring is to be configured. + * @size: Specifies encoded ring element size. To calculate the encoded size use + * the formula (log2(size_bytes) - 2), where size_bytes cannot be + * greater than 256. + * @order_id: Specifies the ring's bus order ID. + * @virtid: Ring virt ID value + * @asel: Ring ASEL (address select) value to be set into the ASEL field of the + * ring's RING_BA_HI register. */ struct ti_sci_msg_rm_ring_cfg { u32 valid_params; @@ -397,10 +434,102 @@ struct ti_sci_rm_psil_ops { #define TI_SCI_MSG_VALUE_RM_UDMAP_CH_BURST_SIZE_VALID BIT(14) /** - * Configures a Navigator Subsystem UDMAP transmit channel + * struct ti_sci_msg_rm_udmap_tx_ch_cfg - Configures a Navigator Subsystem UDMAP + * transmit channel + * + * @valid_params: Bitfield defining validity of tx channel configuration + * parameters. The tx channel configuration fields are not valid, and will not + * be used for ch configuration, if their corresponding valid bit is zero. + * Valid bit usage: + * 0 - Valid bit for @tx_pause_on_err + * 1 - Valid bit for @tx_atype + * 2 - Valid bit for @tx_chan_type + * 3 - Valid bit for @tx_fetch_size + * 4 - Valid bit for @txcq_qnum + * 5 - Valid bit for @tx_priority + * 6 - Valid bit for @tx_qos + * 7 - Valid bit for @tx_orderid + * 8 - Valid bit for @tx_sched_priority + * 9 - Valid bit for @tx_filt_einfo + * 10 - Valid bit for @tx_filt_pswords + * 11 - Valid bit for @tx_supr_tdpkt + * 12 - Valid bit for @tx_credit_count + * 13 - Valid bit for @fdepth + * 14 - Valid bit for @tx_burst_size + * 15 - Valid bit for @tx_tdtype + * 16 - Valid bit for @extended_ch_type + * + * @nav_id: SoC device ID of Navigator Subsystem where tx channel is located + * + * @index: UDMAP transmit channel index. + * + * @tx_pause_on_err: UDMAP transmit channel pause on error configuration to + * be programmed into the tx_pause_on_err field of the channel's TCHAN_TCFG + * register. + * + * @tx_filt_einfo: UDMAP transmit channel extended packet information passing + * configuration to be programmed into the tx_filt_einfo field of the + * channel's TCHAN_TCFG register. + * + * @tx_filt_pswords: UDMAP transmit channel protocol specific word passing + * configuration to be programmed into the tx_filt_pswords field of the + * channel's TCHAN_TCFG register. + * + * @tx_atype: UDMAP transmit channel non Ring Accelerator access pointer + * interpretation configuration to be programmed into the tx_atype field of + * the channel's TCHAN_TCFG register. + * + * @tx_chan_type: UDMAP transmit channel functional channel type and work + * passing mechanism configuration to be programmed into the tx_chan_type + * field of the channel's TCHAN_TCFG register. + * + * @tx_supr_tdpkt: UDMAP transmit channel teardown packet generation suppression + * configuration to be programmed into the tx_supr_tdpkt field of the channel's + * TCHAN_TCFG register. + * + * @tx_fetch_size: UDMAP transmit channel number of 32-bit descriptor words to + * fetch configuration to be programmed into the tx_fetch_size field of the + * channel's TCHAN_TCFG register. The user must make sure to set the maximum + * word count that can pass through the channel for any allowed descriptor type. + * + * @tx_credit_count: UDMAP transmit channel transfer request credit count + * configuration to be programmed into the count field of the TCHAN_TCREDIT + * register. Specifies how many credits for complete TRs are available. * - * Configures a Navigator Subsystem UDMAP transmit channel registers. - * See @ti_sci_msg_rm_udmap_tx_ch_cfg_req + * @txcq_qnum: UDMAP transmit channel completion queue configuration to be + * programmed into the txcq_qnum field of the TCHAN_TCQ register. The specified + * completion queue must be assigned to the host, or a subordinate of the host, + * requesting configuration of the transmit channel. + * + * @tx_priority: UDMAP transmit channel transmit priority value to be programmed + * into the priority field of the channel's TCHAN_TPRI_CTRL register. + * + * @tx_qos: UDMAP transmit channel transmit qos value to be programmed into the + * qos field of the channel's TCHAN_TPRI_CTRL register. + * + * @tx_orderid: UDMAP transmit channel bus order id value to be programmed into + * the orderid field of the channel's TCHAN_TPRI_CTRL register. + * + * @fdepth: UDMAP transmit channel FIFO depth configuration to be programmed + * into the fdepth field of the TCHAN_TFIFO_DEPTH register. Sets the number of + * Tx FIFO bytes which are allowed to be stored for the channel. Check the UDMAP + * section of the TRM for restrictions regarding this parameter. + * + * @tx_sched_priority: UDMAP transmit channel tx scheduling priority + * configuration to be programmed into the priority field of the channel's + * TCHAN_TST_SCHED register. + * + * @tx_burst_size: UDMAP transmit channel burst size configuration to be + * programmed into the tx_burst_size field of the TCHAN_TCFG register. + * + * @tx_tdtype: UDMAP transmit channel teardown type configuration to be + * programmed into the tdtype field of the TCHAN_TCFG register: + * 0 - Return immediately + * 1 - Wait for completion message from remote peer + * + * @extended_ch_type: Valid for BCDMA. + * 0 - the channel is split tx channel (tchan) + * 1 - the channel is block copy channel (bchan) */ struct ti_sci_msg_rm_udmap_tx_ch_cfg { u32 valid_params; @@ -433,10 +562,96 @@ struct ti_sci_msg_rm_udmap_tx_ch_cfg { }; /** - * Configures a Navigator Subsystem UDMAP receive channel + * struct ti_sci_msg_rm_udmap_rx_ch_cfg - Configures a Navigator Subsystem UDMAP + * receive channel + * + * @valid_params: Bitfield defining validity of rx channel configuration + * parameters. + * The rx channel configuration fields are not valid, and will not be used for + * ch configuration, if their corresponding valid bit is zero. + * Valid bit usage: + * 0 - Valid bit for @rx_pause_on_err + * 1 - Valid bit for @rx_atype + * 2 - Valid bit for @rx_chan_type + * 3 - Valid bit for @rx_fetch_size + * 4 - Valid bit for @rxcq_qnum + * 5 - Valid bit for @rx_priority + * 6 - Valid bit for @rx_qos + * 7 - Valid bit for @rx_orderid + * 8 - Valid bit for @rx_sched_priority + * 9 - Valid bit for @flowid_start + * 10 - Valid bit for @flowid_cnt + * 11 - Valid bit for @rx_ignore_short + * 12 - Valid bit for @rx_ignore_long + * 14 - Valid bit for @rx_burst_size + * + * @nav_id: SoC device ID of Navigator Subsystem where rx channel is located + * + * @index: UDMAP receive channel index. + * + * @rx_fetch_size: UDMAP receive channel number of 32-bit descriptor words to + * fetch configuration to be programmed into the rx_fetch_size field of the + * channel's RCHAN_RCFG register. + * + * @rxcq_qnum: UDMAP receive channel completion queue configuration to be + * programmed into the rxcq_qnum field of the RCHAN_RCQ register. + * The specified completion queue must be assigned to the host, or a subordinate + * of the host, requesting configuration of the receive channel. + * + * @rx_priority: UDMAP receive channel receive priority value to be programmed + * into the priority field of the channel's RCHAN_RPRI_CTRL register. + * + * @rx_qos: UDMAP receive channel receive qos value to be programmed into the + * qos field of the channel's RCHAN_RPRI_CTRL register. * - * Configures a Navigator Subsystem UDMAP receive channel registers. - * See @ti_sci_msg_rm_udmap_rx_ch_cfg_req + * @rx_orderid: UDMAP receive channel bus order id value to be programmed into + * the orderid field of the channel's RCHAN_RPRI_CTRL register. + * + * @rx_sched_priority: UDMAP receive channel rx scheduling priority + * configuration to be programmed into the priority field of the channel's + * RCHAN_RST_SCHED register. + * + * @flowid_start: UDMAP receive channel additional flows starting index + * configuration to program into the flow_start field of the RCHAN_RFLOW_RNG + * register. Specifies the starting index for flow IDs the receive channel is to + * make use of beyond the default flow. flowid_start and @flowid_cnt must be + * set as valid and configured together. The starting flow ID set by + * @flowid_start must be a flow index within the Navigator Subsystem's subset + * of flows beyond the default flows statically mapped to receive channels. + * The additional flows must be assigned to the host, or a subordinate of the + * host, requesting configuration of the receive channel. + * + * @flowid_cnt: UDMAP receive channel additional flows count configuration to + * program into the flowid_cnt field of the RCHAN_RFLOW_RNG register. + * This field specifies how many flow IDs are in the additional contiguous range + * of legal flow IDs for the channel. @flowid_start and flowid_cnt must be + * set as valid and configured together. Disabling the valid_params field bit + * for flowid_cnt indicates no flow IDs other than the default are to be + * allocated and used by the receive channel. @flowid_start plus flowid_cnt + * cannot be greater than the number of receive flows in the receive channel's + * Navigator Subsystem. The additional flows must be assigned to the host, or a + * subordinate of the host, requesting configuration of the receive channel. + * + * @rx_pause_on_err: UDMAP receive channel pause on error configuration to be + * programmed into the rx_pause_on_err field of the channel's RCHAN_RCFG + * register. + * + * @rx_atype: UDMAP receive channel non Ring Accelerator access pointer + * interpretation configuration to be programmed into the rx_atype field of the + * channel's RCHAN_RCFG register. + * + * @rx_chan_type: UDMAP receive channel functional channel type and work passing + * mechanism configuration to be programmed into the rx_chan_type field of the + * channel's RCHAN_RCFG register. + * + * @rx_ignore_short: UDMAP receive channel short packet treatment configuration + * to be programmed into the rx_ignore_short field of the RCHAN_RCFG register. + * + * @rx_ignore_long: UDMAP receive channel long packet treatment configuration to + * be programmed into the rx_ignore_long field of the RCHAN_RCFG register. + * + * @rx_burst_size: UDMAP receive channel burst size configuration to be + * programmed into the rx_burst_size field of the RCHAN_RCFG register. */ struct ti_sci_msg_rm_udmap_rx_ch_cfg { u32 valid_params; @@ -463,10 +678,142 @@ struct ti_sci_msg_rm_udmap_rx_ch_cfg { }; /** - * Configures a Navigator Subsystem UDMAP receive flow + * struct ti_sci_msg_rm_udmap_flow_cfg - Configures a Navigator Subsystem UDMAP + * receive flow + * + * @valid_params: + * Bitfield defining validity of rx flow configuration parameters. The + * rx flow configuration fields are not valid, and will not be used for flow + * configuration, if their corresponding valid bit is zero. Valid bit usage: + * 0 - Valid bit for @rx_einfo_present + * 1 - Valid bit for @rx_psinfo_present + * 2 - Valid bit for @rx_error_handling + * 3 - Valid bit for @rx_desc_type + * 4 - Valid bit for @rx_sop_offset + * 5 - Valid bit for @rx_dest_qnum + * 6 - Valid bit for @rx_src_tag_hi + * 7 - Valid bit for @rx_src_tag_lo + * 8 - Valid bit for @rx_dest_tag_hi + * 9 - Valid bit for @rx_dest_tag_lo + * 10 - Valid bit for @rx_src_tag_hi_sel + * 11 - Valid bit for @rx_src_tag_lo_sel + * 12 - Valid bit for @rx_dest_tag_hi_sel + * 13 - Valid bit for @rx_dest_tag_lo_sel + * 14 - Valid bit for @rx_fdq0_sz0_qnum + * 15 - Valid bit for @rx_fdq1_qnum + * 16 - Valid bit for @rx_fdq2_qnum + * 17 - Valid bit for @rx_fdq3_qnum + * 18 - Valid bit for @rx_ps_location + * + * @nav_id: SoC device ID of Navigator Subsystem from which the receive flow is + * allocated + * + * @flow_index: UDMAP receive flow index for non-optional configuration. + * + * @rx_einfo_present: + * UDMAP receive flow extended packet info present configuration to be + * programmed into the rx_einfo_present field of the flow's RFLOW_RFA register. + * + * @rx_psinfo_present: + * UDMAP receive flow PS words present configuration to be programmed into the + * rx_psinfo_present field of the flow's RFLOW_RFA register. + * + * @rx_error_handling: + * UDMAP receive flow error handling configuration to be programmed into the + * rx_error_handling field of the flow's RFLOW_RFA register. + * + * @rx_desc_type: + * UDMAP receive flow descriptor type configuration to be programmed into the + * rx_desc_type field of the flow's RFLOW_RFA register. + * + * @rx_sop_offset: + * UDMAP receive flow start of packet offset configuration to be programmed + * into the rx_sop_offset field of the RFLOW_RFA register. See the UDMAP + * section of the TRM for more information on this setting. Valid values for + * this field are 0-255 bytes. + * + * @rx_dest_qnum: + * UDMAP receive flow destination queue configuration to be programmed into the + * rx_dest_qnum field of the flow's RFLOW_RFA register. The specified + * destination queue must be valid within the Navigator Subsystem and must be + * owned by the host, or a subordinate of the host, requesting allocation and + * configuration of the receive flow. + * + * @rx_src_tag_hi: + * UDMAP receive flow source tag high byte constant configuration to be + * programmed into the rx_src_tag_hi field of the flow's RFLOW_RFB register. + * See the UDMAP section of the TRM for more information on this setting. + * + * @rx_src_tag_lo: + * UDMAP receive flow source tag low byte constant configuration to be + * programmed into the rx_src_tag_lo field of the flow's RFLOW_RFB register. + * See the UDMAP section of the TRM for more information on this setting. + * + * @rx_dest_tag_hi: + * UDMAP receive flow destination tag high byte constant configuration to be + * programmed into the rx_dest_tag_hi field of the flow's RFLOW_RFB register. + * See the UDMAP section of the TRM for more information on this setting. + * + * @rx_dest_tag_lo: + * UDMAP receive flow destination tag low byte constant configuration to be + * programmed into the rx_dest_tag_lo field of the flow's RFLOW_RFB register. + * See the UDMAP section of the TRM for more information on this setting. + * + * @rx_src_tag_hi_sel: + * UDMAP receive flow source tag high byte selector configuration to be + * programmed into the rx_src_tag_hi_sel field of the RFLOW_RFC register. See + * the UDMAP section of the TRM for more information on this setting. + * + * @rx_src_tag_lo_sel: + * UDMAP receive flow source tag low byte selector configuration to be + * programmed into the rx_src_tag_lo_sel field of the RFLOW_RFC register. See + * the UDMAP section of the TRM for more information on this setting. + * + * @rx_dest_tag_hi_sel: + * UDMAP receive flow destination tag high byte selector configuration to be + * programmed into the rx_dest_tag_hi_sel field of the RFLOW_RFC register. See + * the UDMAP section of the TRM for more information on this setting. + * + * @rx_dest_tag_lo_sel: + * UDMAP receive flow destination tag low byte selector configuration to be + * programmed into the rx_dest_tag_lo_sel field of the RFLOW_RFC register. See + * the UDMAP section of the TRM for more information on this setting. + * + * @rx_fdq0_sz0_qnum: + * UDMAP receive flow free descriptor queue 0 configuration to be programmed + * into the rx_fdq0_sz0_qnum field of the flow's RFLOW_RFD register. See the + * UDMAP section of the TRM for more information on this setting. The specified + * free queue must be valid within the Navigator Subsystem and must be owned + * by the host, or a subordinate of the host, requesting allocation and + * configuration of the receive flow. + * + * @rx_fdq1_qnum: + * UDMAP receive flow free descriptor queue 1 configuration to be programmed + * into the rx_fdq1_qnum field of the flow's RFLOW_RFD register. See the + * UDMAP section of the TRM for more information on this setting. The specified + * free queue must be valid within the Navigator Subsystem and must be owned + * by the host, or a subordinate of the host, requesting allocation and + * configuration of the receive flow. + * + * @rx_fdq2_qnum: + * UDMAP receive flow free descriptor queue 2 configuration to be programmed + * into the rx_fdq2_qnum field of the flow's RFLOW_RFE register. See the + * UDMAP section of the TRM for more information on this setting. The specified + * free queue must be valid within the Navigator Subsystem and must be owned + * by the host, or a subordinate of the host, requesting allocation and + * configuration of the receive flow. + * + * @rx_fdq3_qnum: + * UDMAP receive flow free descriptor queue 3 configuration to be programmed + * into the rx_fdq3_qnum field of the flow's RFLOW_RFE register. See the + * UDMAP section of the TRM for more information on this setting. The specified + * free queue must be valid within the Navigator Subsystem and must be owned + * by the host, or a subordinate of the host, requesting allocation and + * configuration of the receive flow. * - * Configures a Navigator Subsystem UDMAP receive flow's registers. - * See @tis_ci_msg_rm_udmap_flow_cfg_req + * @rx_ps_location: + * UDMAP receive flow PS words location configuration to be programmed into the + * rx_ps_location field of the flow's RFLOW_RFA register. */ struct ti_sci_msg_rm_udmap_flow_cfg { u32 valid_params; @@ -516,7 +863,7 @@ struct ti_sci_msg_rm_udmap_flow_cfg { * struct ti_sci_rm_udmap_ops - UDMA Management operations * @tx_ch_cfg: configure SoC Navigator Subsystem UDMA transmit channel. * @rx_ch_cfg: configure SoC Navigator Subsystem UDMA receive channel. - * @rx_flow_cfg1: configure SoC Navigator Subsystem UDMA receive flow. + * @rx_flow_cfg: configure SoC Navigator Subsystem UDMA receive flow. */ struct ti_sci_rm_udmap_ops { int (*tx_ch_cfg)(const struct ti_sci_handle *handle, @@ -558,10 +905,15 @@ struct ti_sci_proc_ops { /** * struct ti_sci_ops - Function support for TI SCI + * @core_ops: SoC core operations * @dev_ops: Device specific operations * @clk_ops: Clock specific operations + * @pm_ops: Low Power Mode (LPM) control operations * @rm_core_ops: Resource management core operations. * @rm_irq_ops: IRQ management specific operations + * @rm_ring_ops: Ring Accelerator Management operations + * @rm_psil_ops: PSI-L thread operations + * @rm_udmap_ops: UDMA Management operations * @proc_ops: Processor Control specific operations */ struct ti_sci_ops { -- 2.34.1