From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 1A345CA5FCB for ; Thu, 1 Oct 2026 11:07:51 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:Cc: To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=+MdDIh2T6ZCxr2r7zyfCb+TCZcpbNFMkgiUz7gqC4AU=; b=WGtcM6UVF7Z7MKaLYLVgjX8wPH rEpAyz9DSZeNRLOidIuAimpiVLwKL7eK2IiiBHKlqRn+AXVPDmlGRPnbyQiLFC/SbAaEIDIt2yZeN 0FlnTDEfzQpcQtLuWqUUBK6Q8uytlghE4hDDsfbqCXHnkY+kkn21TgTY90jHaiHib0H3rOyigIbz+ Uf359XYlbNZAF2MtANtvH3HaYrfUItCLhl5PEfPUMYEKxv1I0ZWDFy7XOUZqGXHVRyqUGQOTtK60V HpVdSZ8n/gUGuOCUBpgZiW9uC0KX6mDwkMCewJ0oYlaiCxSJmR6WSuXauyzsMwXACLCTX79lXNG5M 0bXqfz3A==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.99.1 #2 (Red Hat Linux)) id 1xCEdc-00000008b8n-0JdZ; Thu, 01 Oct 2026 11:07:44 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.99.1 #2 (Red Hat Linux)) id 1xCEdZ-00000008b7e-3b9Y for linux-arm-kernel@lists.infradead.org; Thu, 01 Oct 2026 11:07:43 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id C5D14497; Thu, 1 Oct 2026 04:07:36 -0700 (PDT) Received: from e142392.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.121.207.14]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 99E363F86F; Thu, 1 Oct 2026 04:07:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=arm.com; s=foss; t=1790852860; bh=yEcODPs/JVj3qaCyrYR+sHXqC9guLfgCT9uj2ITLQnY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Dks2nePANzHkekdku+n19iz6SUU3FyX3QoOa9eWYO37E1ifmlHoBJmtIGeeuryI8Q M6P4sqZ6isQCkGFOoEnjjKGfbThYgWa1dH7sn4NdmWRc/JLSvxLReo2jjU27dWhQiQ XNZNO2Al0g9zJdRWZlK4szU3Dn4kp6rn2HiY10/Q= From: =?UTF-8?q?Kristina=20Mart=C5=A1enko?= To: linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org, kvmarm@lists.linux.dev, linux-efi@vger.kernel.org Cc: Catalin Marinas , Will Deacon , Mark Rutland , Ryan Roberts , David Hildenbrand , Lorenzo Stoakes , Linu Cherian , Anshuman Khandual , Lorenzo Pieralisi , Hanjun Guo , Sudeep Holla , Marc Zyngier , Oliver Upton , Fuad Tabba , Joey Gouly , Steffen Eiden , Suzuki K Poulose , Zenghui Yu , Ard Biesheuvel , Ilias Apalodimas Subject: [RFC 03/12] KVM: arm64: Hide TLBID from guest sysregs Date: Thu, 1 Oct 2026 12:06:46 +0100 Message-ID: <20261001110655.461473-4-kristina.martsenko@arm.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20261001110655.461473-1-kristina.martsenko@arm.com> References: <20261001110655.461473-1-kristina.martsenko@arm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20261001_040741_987736_2504D86C X-CRM114-Status: GOOD ( 12.89 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Don't expose FEAT_TLBID to guests. It wouldn't be useful in the general case since a guest doesn't know which domains exist and its vCPUs can be moved between any physical CPUs. Try to hide TLBID sysregs and sysreg fields from the guest: * Report the feature as not supported in the ID register ID_AA64MMFR4_EL1.TLBID. * Configure the TLBIDIDR_EL1 sysreg to UNDEF via the FGU mechanism. Sanitize a nested hypervisor's HFGRTR2.nTLBIDIDR. * Sanitize a nested hypervisor's HCRX.{VTLBIDEn,VTLBIDOSEn,FNB}. * VTLBID{OS}_EL2 registers are VNCR-backed and not exposed to guests (apart from being able to read/write into the VNCR page) so no need to handle them in sys_reg_descs or elsewhere. * The guest is free to set SCTLR2_EL{1,2}.TLBOSNIS, which shouldn't matter to KVM. Signed-off-by: Kristina Martšenko --- arch/arm64/kvm/config.c | 6 ++++++ arch/arm64/kvm/emulate-nested.c | 1 + arch/arm64/kvm/sys_regs.c | 3 +++ 3 files changed, 10 insertions(+) diff --git a/arch/arm64/kvm/config.c b/arch/arm64/kvm/config.c index 1053676551af..6c116aa1864a 100644 --- a/arch/arm64/kvm/config.c +++ b/arch/arm64/kvm/config.c @@ -226,6 +226,7 @@ struct reg_feat_map_desc { #define FEAT_S2PIE ID_AA64MMFR3_EL1, S2PIE, IMP #define FEAT_GCIE ID_AA64PFR2_EL1, GCIE, IMP #define FEAT_NV3 ID_AA64MMFR4_EL1, NV_frac, NV3 +#define FEAT_TLBID ID_AA64MMFR4_EL1, TLBID, IMP static bool not_feat_aa64el3(struct kvm *kvm) { @@ -813,6 +814,7 @@ static const struct reg_bits_to_feat_map hfgrtr2_feat_map[] = { HFGRTR2_EL2_nTCRMASK_EL1, FEAT_SRMASK), NEEDS_FEAT(HFGRTR2_EL2_nRCWSMASK_EL1, FEAT_THE), + NEEDS_FEAT(HFGRTR2_EL2_nTLBIDIDR_EL1, FEAT_TLBID), }; static const DECLARE_FEAT_MAP_FGT(hfgrtr2_desc, hfgrtr2_masks, @@ -911,6 +913,10 @@ static const struct reg_bits_to_feat_map hcrx_feat_map[] = { HCRX_EL2_NVnTTLBOS, FEAT_NV3), NEEDS_FEAT(HCRX_EL2_SRMASKEn, FEAT_SRMASK), + NEEDS_FEAT(HCRX_EL2_FNB | + HCRX_EL2_VTLBIDOSEn | + HCRX_EL2_VTLBIDEn, + FEAT_TLBID), NEEDS_FEAT(HCRX_EL2_PACMEn, feat_pauth_lr), NEEDS_FEAT(HCRX_EL2_EnFPM, FEAT_FPMR), NEEDS_FEAT(HCRX_EL2_GCSEn, FEAT_GCS), diff --git a/arch/arm64/kvm/emulate-nested.c b/arch/arm64/kvm/emulate-nested.c index 625604019fb3..cd8ad03028e7 100644 --- a/arch/arm64/kvm/emulate-nested.c +++ b/arch/arm64/kvm/emulate-nested.c @@ -1440,6 +1440,7 @@ static const struct encoding_to_trap_config encoding_to_fgt[] __initconst = { SR_FGT(SYS_TCRALIAS_EL1, HFGRTR2, nTCRALIAS_EL1, 0), SR_FGT(SYS_TCRMASK_EL1, HFGRTR2, nTCRMASK_EL1, 0), SR_FGT(SYS_ERXGSR_EL1, HFGRTR2, nERXGSR_EL1, 0), + SR_FGT(SYS_TLBIDIDR_EL1, HFGRTR2, nTLBIDIDR_EL1, 0), /* HFGITR_EL2 */ SR_FGT(OP_AT_S1E1A, HFGITR, ATS1E1A, 1), diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c index 44aae52c473d..6a025e1f3161 100644 --- a/arch/arm64/kvm/sys_regs.c +++ b/arch/arm64/kvm/sys_regs.c @@ -1984,6 +1984,9 @@ static u64 __kvm_read_sanitised_id_reg(const struct kvm_vcpu *vcpu, if (!system_supports_poe()) val &= ~ID_AA64MMFR3_EL1_S1POE; break; + case SYS_ID_AA64MMFR4_EL1: + val &= ~ID_AA64MMFR4_EL1_TLBID; + break; case SYS_ID_MMFR4_EL1: val &= ~ID_MMFR4_EL1_CCIDX; break; -- 2.43.0