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Fri, 02 Oct 2026 18:27:23 -0700 (PDT) Received: from localhost ([201.89.183.74]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-151fcec9a95sm1116843c88.15.2026.10.02.18.27.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 02 Oct 2026 18:27:22 -0700 (PDT) From: Otavio Salvador To: Chen-Yu Tsai , Jernej Skrabec , Samuel Holland , Srinivas Kandagatla , Rob Herring , Krzysztof Kozlowski , Conor Dooley Cc: Maxime Ripard , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-sunxi@lists.linux.dev, linux-kernel@vger.kernel.org, Otavio Salvador Subject: [PATCH 2/2] ARM: dts: sun8i-r40: Add SID node and THS calibration Date: Fri, 2 Oct 2026 22:25:36 -0300 Message-ID: <20261003012534.418820-5-otavio@ossystems.com.br> X-Mailer: git-send-email 2.55.0 In-Reply-To: <20261003012534.418820-3-otavio@ossystems.com.br> References: <20261003012534.418820-3-otavio@ossystems.com.br> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20261002_182724_367933_85B99108 X-CRM114-Status: GOOD ( 14.21 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Without the calibration cell, the THS driver leaves the sensor calibration registers at their reset value (0x800) and the reported temperatures drift from the real die temperature by a chip-dependent offset. Add the SID node at 0x01c1b000 and wire the thermal sensor to its factory calibration at eFuse offset 0x40, one 16-bit word for each of the two sensors. The R40 user manual gives the size of the thermal sensor key (32 bits) but not its offset. The vendor SDK key map names 0x48 "thermal_sensor", but that word is zero on all the boards checked. On an A40i running the Boardcon vendor kernel, the THS_0_1_CDATA register holds exactly the eFuse word at 0x40 (0x08780875), which confirms the location. Tested on two Boardcon EMA40i (A40i) boards: THS_0_1_CDATA now holds the eFuse word at 0x40 of each chip (0x082d0822 and 0x083d0838) instead of the reset value 0x08000800. Signed-off-by: Otavio Salvador --- arch/arm/boot/dts/allwinner/sun8i-r40.dtsi | 15 ++++++++++++++- 1 file changed, 14 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/allwinner/sun8i-r40.dtsi b/arch/arm/boot/dts/allwinner/sun8i-r40.dtsi index f0ed802a9d08e..c7c9cad695ca4 100644 --- a/arch/arm/boot/dts/allwinner/sun8i-r40.dtsi +++ b/arch/arm/boot/dts/allwinner/sun8i-r40.dtsi @@ -485,6 +485,18 @@ ohci1: usb@1c19400 { status = "disabled"; }; + sid: efuse@1c1b000 { + compatible = "allwinner,sun8i-r40-sid", + "allwinner,sun50i-a64-sid"; + reg = <0x01c1b000 0x400>; + #address-cells = <1>; + #size-cells = <1>; + + ths_calibration: thermal-sensor-calibration@40 { + reg = <0x40 0x4>; + }; + }; + ehci2: usb@1c1c000 { compatible = "allwinner,sun8i-r40-ehci", "generic-ehci"; reg = <0x01c1c000 0x100>; @@ -832,7 +844,8 @@ ths: thermal-sensor@1c24c00 { clock-names = "bus", "mod"; interrupts = ; resets = <&ccu RST_BUS_THS>; - /* TODO: add nvmem-cells for calibration */ + nvmem-cells = <&ths_calibration>; + nvmem-cell-names = "calibration"; #thermal-sensor-cells = <1>; }; -- 2.55.0