From: Dileep Kumar Nagavarapu <dileepkumar.nagavarapu@amd.com>
To: "Jonathan Cameron" <jic23@kernel.org>,
"David Lechner" <dlechner@baylibre.com>,
"Nuno Sá" <nuno.sa@analog.com>,
"Andy Shevchenko" <andy@kernel.org>,
"Michal Simek" <michal.simek@amd.com>,
"Conall O'Griofa" <conall.ogriofa@amd.com>
Cc: <linux-iio@vger.kernel.org>,
<linux-arm-kernel@lists.infradead.org>,
<linux-kernel@vger.kernel.org>, <git@amd.com>,
Dileep Kumar Nagavarapu <dileepkumar.nagavarapu@amd.com>,
Sai Krishna Potthuri <sai.krishna.potthuri@amd.com>
Subject: [PATCH v4 03/15] iio: adc: xilinx-xadc: Use kernel integer types
Date: Mon, 5 Oct 2026 15:11:53 +0530 [thread overview]
Message-ID: <20261005094205.1045874-4-dileepkumar.nagavarapu@amd.com> (raw)
In-Reply-To: <20261005094205.1045874-1-dileepkumar.nagavarapu@amd.com>
Replace stdint types with kernel types and include linux/types.h
to explicitly provide the corresponding type definitions.
No functional changes intended.
Co-developed-by: Sai Krishna Potthuri <sai.krishna.potthuri@amd.com>
Signed-off-by: Sai Krishna Potthuri <sai.krishna.potthuri@amd.com>
Signed-off-by: Dileep Kumar Nagavarapu <dileepkumar.nagavarapu@amd.com>
---
drivers/iio/adc/xilinx-xadc-core.c | 49 ++++++++++++++--------------
drivers/iio/adc/xilinx-xadc-events.c | 3 +-
drivers/iio/adc/xilinx-xadc.h | 19 ++++++-----
3 files changed, 37 insertions(+), 34 deletions(-)
diff --git a/drivers/iio/adc/xilinx-xadc-core.c b/drivers/iio/adc/xilinx-xadc-core.c
index 472246b6a1c7..1c60d4f38ffe 100644
--- a/drivers/iio/adc/xilinx-xadc-core.c
+++ b/drivers/iio/adc/xilinx-xadc-core.c
@@ -23,6 +23,7 @@
#include <linux/property.h>
#include <linux/slab.h>
#include <linux/sysfs.h>
+#include <linux/types.h>
#include <linux/iio/buffer.h>
#include <linux/iio/events.h>
@@ -119,12 +120,12 @@ static const unsigned int XADC_ZYNQ_UNMASK_TIMEOUT = 500;
*/
#define XADC_MAX_SAMPLERATE 150000
-static void xadc_write_reg(struct xadc *xadc, unsigned int reg, uint32_t val)
+static void xadc_write_reg(struct xadc *xadc, unsigned int reg, u32 val)
{
writel(val, xadc->base + reg);
}
-static void xadc_read_reg(struct xadc *xadc, unsigned int reg, uint32_t *val)
+static void xadc_read_reg(struct xadc *xadc, unsigned int reg, u32 *val)
{
*val = readl(xadc->base + reg);
}
@@ -138,7 +139,7 @@ static void xadc_read_reg(struct xadc *xadc, unsigned int reg, uint32_t *val)
* sleep and wait for an interrupt that signals that a response is available in
* the data FIFO.
*/
-static void xadc_zynq_write_fifo(struct xadc *xadc, uint32_t *cmd, unsigned int n)
+static void xadc_zynq_write_fifo(struct xadc *xadc, u32 *cmd, unsigned int n)
{
unsigned int i;
@@ -148,7 +149,7 @@ static void xadc_zynq_write_fifo(struct xadc *xadc, uint32_t *cmd, unsigned int
static void xadc_zynq_drain_fifo(struct xadc *xadc)
{
- uint32_t status, tmp;
+ u32 status, tmp;
xadc_read_reg(xadc, XADC_ZYNQ_REG_STATUS, &status);
@@ -166,10 +167,10 @@ static void xadc_zynq_update_intmsk(struct xadc *xadc, unsigned int mask, unsign
xadc_write_reg(xadc, XADC_ZYNQ_REG_INTMSK, xadc->zynq_intmask | xadc->zynq_masked_alarm);
}
-static int xadc_zynq_write_adc_reg(struct xadc *xadc, unsigned int reg, uint16_t val)
+static int xadc_zynq_write_adc_reg(struct xadc *xadc, unsigned int reg, u16 val)
{
- uint32_t cmd[1];
- uint32_t tmp;
+ u32 cmd[1];
+ u32 tmp;
int ret;
spin_lock_irq(&xadc->lock);
@@ -198,10 +199,10 @@ static int xadc_zynq_write_adc_reg(struct xadc *xadc, unsigned int reg, uint16_t
return ret;
}
-static int xadc_zynq_read_adc_reg(struct xadc *xadc, unsigned int reg, uint16_t *val)
+static int xadc_zynq_read_adc_reg(struct xadc *xadc, unsigned int reg, u16 *val)
{
- uint32_t cmd[2];
- uint32_t resp, tmp;
+ u32 cmd[2];
+ u32 resp, tmp;
int ret;
cmd[0] = XADC_ZYNQ_CMD(XADC_ZYNQ_CMD_READ, reg, 0);
@@ -283,7 +284,7 @@ static irqreturn_t xadc_zynq_interrupt_handler(int irq, void *devid)
{
struct iio_dev *indio_dev = devid;
struct xadc *xadc = iio_priv(indio_dev);
- uint32_t status;
+ u32 status;
xadc_read_reg(xadc, XADC_ZYNQ_REG_INTSTS, &status);
@@ -387,7 +388,7 @@ static int xadc_zynq_setup(struct platform_device *pdev, struct iio_dev *indio_d
static unsigned long xadc_zynq_get_dclk_rate(struct xadc *xadc)
{
unsigned int div;
- uint32_t val;
+ u32 val;
xadc_read_reg(xadc, XADC_ZYNQ_REG_CFG, &val);
@@ -412,7 +413,7 @@ static unsigned long xadc_zynq_get_dclk_rate(struct xadc *xadc)
static void xadc_zynq_update_alarm(struct xadc *xadc, unsigned int alarm)
{
unsigned long flags;
- uint32_t status;
+ u32 status;
/* Move OT to bit 7 */
alarm = ((alarm & 0x08) << 4) | ((alarm & 0xf0) >> 1) | (alarm & 0x07);
@@ -446,9 +447,9 @@ static const unsigned int xadc_axi_reg_offsets[] = {
[XADC_TYPE_US] = XADC_US_AXI_ADC_REG_OFFSET,
};
-static int xadc_axi_read_adc_reg(struct xadc *xadc, unsigned int reg, uint16_t *val)
+static int xadc_axi_read_adc_reg(struct xadc *xadc, unsigned int reg, u16 *val)
{
- uint32_t val32;
+ u32 val32;
xadc_read_reg(xadc, xadc_axi_reg_offsets[xadc->ops->type] + reg * 4, &val32);
*val = val32 & 0xffff;
@@ -456,7 +457,7 @@ static int xadc_axi_read_adc_reg(struct xadc *xadc, unsigned int reg, uint16_t *
return 0;
}
-static int xadc_axi_write_adc_reg(struct xadc *xadc, unsigned int reg, uint16_t val)
+static int xadc_axi_write_adc_reg(struct xadc *xadc, unsigned int reg, u16 val)
{
xadc_write_reg(xadc, xadc_axi_reg_offsets[xadc->ops->type] + reg * 4, val);
@@ -477,8 +478,8 @@ static irqreturn_t xadc_axi_interrupt_handler(int irq, void *devid)
{
struct iio_dev *indio_dev = devid;
struct xadc *xadc = iio_priv(indio_dev);
- uint32_t status, mask;
unsigned int events;
+ u32 status, mask;
xadc_read_reg(xadc, XADC_AXI_REG_IPISR, &status);
xadc_read_reg(xadc, XADC_AXI_REG_IPIER, &mask);
@@ -510,8 +511,8 @@ static irqreturn_t xadc_axi_interrupt_handler(int irq, void *devid)
static void xadc_axi_update_alarm(struct xadc *xadc, unsigned int alarm)
{
- uint32_t val;
unsigned long flags;
+ u32 val;
/*
* The order of the bits in the AXI-XADC status register does not match
@@ -565,9 +566,9 @@ static const struct xadc_ops xadc_us_axi_ops = {
.temp_offset = 280231,
};
-static int _xadc_update_adc_reg(struct xadc *xadc, unsigned int reg, uint16_t mask, uint16_t val)
+static int _xadc_update_adc_reg(struct xadc *xadc, unsigned int reg, u16 mask, u16 val)
{
- uint16_t tmp;
+ u16 tmp;
int ret;
ret = _xadc_read_adc_reg(xadc, reg, &tmp);
@@ -577,7 +578,7 @@ static int _xadc_update_adc_reg(struct xadc *xadc, unsigned int reg, uint16_t ma
return _xadc_write_adc_reg(xadc, reg, (tmp & ~mask) | val);
}
-static int xadc_update_adc_reg(struct xadc *xadc, unsigned int reg, uint16_t mask, uint16_t val)
+static int xadc_update_adc_reg(struct xadc *xadc, unsigned int reg, u16 mask, u16 val)
{
int ret;
@@ -738,7 +739,7 @@ static struct iio_trigger *xadc_alloc_trigger(struct iio_dev *indio_dev, const c
static int xadc_power_adc_b(struct xadc *xadc, unsigned int seq_mode)
{
- uint16_t val;
+ u16 val;
/*
* As per datasheet the power-down bits are don't care in the
@@ -869,7 +870,7 @@ static const struct iio_buffer_setup_ops xadc_buffer_ops = {
static int xadc_read_samplerate(struct xadc *xadc)
{
unsigned int div;
- uint16_t val16;
+ u16 val16;
int ret;
ret = xadc_read_adc_reg(xadc, XADC_REG_CONF2, &val16);
@@ -888,7 +889,7 @@ static int xadc_read_raw(struct iio_dev *indio_dev,
{
struct xadc *xadc = iio_priv(indio_dev);
unsigned int bits = chan->scan_type.realbits;
- uint16_t val16;
+ u16 val16;
int ret;
switch (info) {
diff --git a/drivers/iio/adc/xilinx-xadc-events.c b/drivers/iio/adc/xilinx-xadc-events.c
index f92776cd90c0..f5b5aad6e313 100644
--- a/drivers/iio/adc/xilinx-xadc-events.c
+++ b/drivers/iio/adc/xilinx-xadc-events.c
@@ -9,6 +9,7 @@
#include <linux/iio/events.h>
#include <linux/iio/iio.h>
#include <linux/kernel.h>
+#include <linux/types.h>
#include "xilinx-xadc.h"
@@ -125,7 +126,7 @@ int xadc_write_event_config(struct iio_dev *indio_dev, const struct iio_chan_spe
{
unsigned int alarm = xadc_get_alarm_mask(chan);
struct xadc *xadc = iio_priv(indio_dev);
- uint16_t cfg, old_cfg;
+ u16 cfg, old_cfg;
int ret;
mutex_lock(&xadc->mutex);
diff --git a/drivers/iio/adc/xilinx-xadc.h b/drivers/iio/adc/xilinx-xadc.h
index b36510450982..fb911ed87600 100644
--- a/drivers/iio/adc/xilinx-xadc.h
+++ b/drivers/iio/adc/xilinx-xadc.h
@@ -12,6 +12,7 @@
#include <linux/interrupt.h>
#include <linux/mutex.h>
#include <linux/spinlock.h>
+#include <linux/types.h>
struct iio_dev;
struct clk;
@@ -42,11 +43,11 @@ struct xadc {
const struct xadc_ops *ops;
- uint16_t threshold[16];
- uint16_t temp_hysteresis;
+ u16 threshold[16];
+ u16 temp_hysteresis;
unsigned int alarm_mask;
- uint16_t *data;
+ u16 *data;
struct iio_trigger *trigger;
struct iio_trigger *convst_trigger;
@@ -70,8 +71,8 @@ enum xadc_type {
};
struct xadc_ops {
- int (*read)(struct xadc *xadc, unsigned int reg, uint16_t *val);
- int (*write)(struct xadc *xadc, unsigned int reg, uint16_t val);
+ int (*read)(struct xadc *xadc, unsigned int reg, u16 *val);
+ int (*write)(struct xadc *xadc, unsigned int reg, u16 val);
int (*setup)(struct platform_device *pdev, struct iio_dev *indio_dev, int irq);
void (*update_alarm)(struct xadc *xadc, unsigned int alarm);
unsigned long (*get_dclk_rate)(struct xadc *xadc);
@@ -83,19 +84,19 @@ struct xadc_ops {
int temp_offset;
};
-static inline int _xadc_read_adc_reg(struct xadc *xadc, unsigned int reg, uint16_t *val)
+static inline int _xadc_read_adc_reg(struct xadc *xadc, unsigned int reg, u16 *val)
{
lockdep_assert_held(&xadc->mutex);
return xadc->ops->read(xadc, reg, val);
}
-static inline int _xadc_write_adc_reg(struct xadc *xadc, unsigned int reg, uint16_t val)
+static inline int _xadc_write_adc_reg(struct xadc *xadc, unsigned int reg, u16 val)
{
lockdep_assert_held(&xadc->mutex);
return xadc->ops->write(xadc, reg, val);
}
-static inline int xadc_read_adc_reg(struct xadc *xadc, unsigned int reg, uint16_t *val)
+static inline int xadc_read_adc_reg(struct xadc *xadc, unsigned int reg, u16 *val)
{
int ret;
@@ -105,7 +106,7 @@ static inline int xadc_read_adc_reg(struct xadc *xadc, unsigned int reg, uint16_
return ret;
}
-static inline int xadc_write_adc_reg(struct xadc *xadc, unsigned int reg, uint16_t val)
+static inline int xadc_write_adc_reg(struct xadc *xadc, unsigned int reg, u16 val)
{
int ret;
--
2.34.1
next prev parent reply other threads:[~2026-10-05 9:42 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-10-05 9:41 [PATCH v4 00/15] iio: adc: xilinx-xadc: Add I2C interface support for System Management Wizard Dileep Kumar Nagavarapu
2026-10-05 9:41 ` [PATCH v4 01/15] iio: adc: xilinx-xadc: Correct write edge in CFG Dileep Kumar Nagavarapu
2026-10-05 9:41 ` [PATCH v4 02/15] iio: adc: xilinx-xadc: Fix coding style issues Dileep Kumar Nagavarapu
2026-10-05 9:41 ` Dileep Kumar Nagavarapu [this message]
2026-10-05 9:41 ` [PATCH v4 04/15] iio: adc: xilinx-xadc: Drop unnecessary masking and dead code Dileep Kumar Nagavarapu
2026-10-05 9:41 ` [PATCH v4 05/15] iio: adc: xilinx-xadc: Use bitfield helpers and bit macros Dileep Kumar Nagavarapu
2026-10-05 9:41 ` [PATCH v4 06/15] iio: adc: xilinx-xadc: Use guard()/scoped_guard() for spinlock locking Dileep Kumar Nagavarapu
2026-10-05 13:13 ` Joshua Crofts
2026-10-05 9:41 ` [PATCH v4 07/15] iio: adc: xilinx-xadc: Simplify common coding patterns Dileep Kumar Nagavarapu
2026-10-05 9:41 ` [PATCH v4 08/15] iio: adc: xilinx-xadc: Add unit suffixes to macro names Dileep Kumar Nagavarapu
2026-10-05 9:41 ` [PATCH v4 09/15] iio: adc: xilinx-xadc: Drop unused header files Dileep Kumar Nagavarapu
2026-10-05 12:56 ` Joshua Crofts
2026-10-05 9:42 ` [PATCH v4 10/15] iio: adc: xilinx-xadc: Add clarifying comments Dileep Kumar Nagavarapu
2026-10-05 13:09 ` Joshua Crofts
2026-10-05 9:42 ` [PATCH v4 11/15] iio: adc: xilinx-xadc: Refine Zynq read/write error handling on timeout/interrupt Dileep Kumar Nagavarapu
2026-10-05 9:42 ` [PATCH v4 12/15] iio: adc: xilinx-xadc: Add helper functions for the device setup Dileep Kumar Nagavarapu
2026-10-05 9:42 ` [PATCH v4 13/15] iio: adc: xilinx-xadc: Split driver into core and platform files Dileep Kumar Nagavarapu
2026-10-05 9:42 ` [PATCH v4 14/15] iio: adc: xilinx-xadc: Add .setup_channels() to struct xadc_ops Dileep Kumar Nagavarapu
2026-10-05 9:42 ` [PATCH v4 15/15] iio: adc: xilinx-xadc: Add I2C interface support Dileep Kumar Nagavarapu
2026-10-05 9:58 ` [PATCH v4 00/15] iio: adc: xilinx-xadc: Add I2C interface support for System Management Wizard Joshua Crofts
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